AD9816 Datasheet, PDF(14/16 Page) Analog Devices – Complete 12-Bit 6 MSPS CCD/CIS Signal Processor

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AD9816 Datasheet, PDF (14/16 Pages) Analog Devices – Complete 12-Bit 6 MSPS CCD/CIS Signal Processor

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AD9816

APPLICATIONS INFORMATION

CDS Mode Circuit

The recommended circuit configuration for CDS mode opera-

tion is shown in Figure 20. The input coupling capacitor value

of 1200 pF is recommended, but this value may be adjusted to

suit a particular application (see Circuit Descriptions). A single

ground plane is recommended for the AD9816. A separate power

supply may be used for DRVDD, the digital driver supply, but this

supply pin should still be decoupled to the same ground plane

as the rest of the AD9816. The loading of the digital outputs

should be minimized, either by using short traces to the digital

ASIC, or by using external digital buffers. All 0.01 ÂµF and

0.1 ÂµF decoupling capacitors should be located as close as pos-

sible to the AD9816 pins. Also, the 1200 pF input capacitors

should be located close the AD9816âs analog input pins.

VDD

0.1â®F 0.01â®F

0.01â®F 0.1â®F

10â®F

0.1â®F

10â®F 0.1â®F

0.1â®F

0.1â®F 1.0â®F

RED_IN

GREEN_IN

BLUE_IN

1200pF

1 AVDD

2 AVSS

3 CAPT

4 CAPT

5 CAPB

6 CAPB

7 VREF

8 CML

9 VINR

10 AVSS

11 VING

AD9816

VDD

0.1â®F

0.01â®F

1kâ

VDD

1.0â®F 0.1â®F 1.5kâ

DRVSS 33

DB5 32

DB4 31

DB3 30

DB2 29

DB1 28

DB0 (LSB) 27

DVSS 26

SLOAD 25

SDATA 24

SCLK 23

DB5

DB4

DB3

DB2

DB1

DB0 (LSB)

SLOAD

SDATA

SCLK

NC = NO CONNECT

VDD

0.01â®F 0.1â®F

ADCCLK

CDSCLK2

CDSCLK1

Figure 20. Recommended Circuit for CDS Mode

â14â

REV. A

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