AD9648 Datasheet, PDF (14/44 Pages) Analog Devices – 14-Bit, 125 MSPS/105 MSPS, 1.8 V Dual Analog-to-Digital Converter

AD9648
Pin No.
Mnemonic
Digital Outputs
27
D0A (LSB)
29
D1A
30
D2A
31
D3A
32
D4A
33
D5A
34
D6A
35
D7A
36
D8A
38
D9A
39
D10A
40
D11A
41
D12A
42
D13A (MSB)
43
ORA
6
D0B (LSB)
7
D1B
8
D2B
9
D3B
11
D4B
12
D5B
13
D6B
14
D7B
15
D8B
16
D9B
17
D10B
18
D11B
20
D12B
21
D13B (MSB)
22
ORB
24
DCOA
23
DCOB
SPI Control
45
SCLK/DFS
44
SDIO/DCS
46
CSB
ADC Configuration
47
OEB
48
PDWN
Type
Description
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A Overrange Output.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B Overrange Output
Channel A Data Clock Output.
Channel B Data Clock Output.
Input
Input/Output
Input
SPI Serial Clock/Data Format Select Pin in External Pin Mode.
SPI Serial Data I/O/Duty Cycle Stabilizer Pin in External Pin Mode.
SPI Chip Select (Active Low).
Input
Input
Output Enable Input (Active Low). Pin must be enabled via SPI.
Power-Down Input in External Pin Mode. In SPI mode, this input can be configured
as power-down or standby.
Rev. 0 | Page 14 of 44