AD7177-2 Datasheet, PDF (14/59 Pages) Analog Devices – 32-Bit, 10 kSPS, Sigma-Delta ADC with 100 μs Settling and True Rail-to-Rail Buffers

AD7177-2
–80
–90
–100
–110
–120
–130
–140
–150
–160
–170
–180
10
20
30
40
50
60
70
V_IN FREQUENCY (Hz)
Figure 17. Common-Mode Rejection Ratio (CMRR) vs. VIN Frequency
(VIN = 0.1 V, 10 Hz to 70 Hz, Output Data Rate = 20 SPS, Enhanced Filter)
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AVDD1—EXTERNAL 2.5V REFERENCE
AVDD1—INTERNAL 2.5V REFERENCE
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–90
–100
–110
–120
–130
1
10 100 1k 10k 100k 1M 10M 100M
V_IN FREQUENCY (Hz)
Figure 18. Power Supply Rejection Ratio (PSRR) vs. VIN Frequency
20
INTERNAL 2.5V REF,
ANALOG INPUT BUFFERS OFF
15
INTERNAL 2.5V REF,
ANALOG INPUT BUFFERS ON
EXTERNAL 2.5V REF,
ANALOG INPUT BUFFERS OFF
10
EXTERNAL 2.5V REF,
ANALOG INPUT BUFFERS ON
EXTERNAL 5V REF,
5
ANALOG INPUT BUFFERS OFF
EXTERNAL 5V REF,
ANALOG INPUT BUFFERS ON
0
–5
–10
–15
–20
–5 –4 –3 –2 –1 0 1 2 3 4 5
V_IN (V)
Figure 19. Integral Nonlinearity (INL) vs. VIN
(Differential Input)
Data Sheet
30
25
20
15
10
5
0
2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00
INL ERROR (ppm)
Figure 20. Integral Nonlinearity (INL) Distribution Histogram (Differential
Input, All Input Buffers Enabled, VREF = 2.5 V External, 100 Units)
30
25
20
15
10
5
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
INL ERROR (ppm)
Figure 21. Integral Nonlinearity (INL) Distribution Histogram (Differential
Input, All Input Buffers Disabled, VREF = 2.5 V External, 100 Units)
30
25
20
15
10
5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
INL ERROR (ppm)
Figure 22. Integral Nonlinearity (INL) Distribution Histogram (All Input
Buffers Enabled, Differential Input, VREF = 5 V External, 100 Units)
Rev. A | Page 14 of 59