AD9774 Datasheet, PDF (13/24 Pages) Analog Devices – 14-Bit, 32 MSPS TxDAC™ with 4x Interpolation Filters

AD9774
+2.7 TO +5.5V_A
AVDD
EXTERNAL
REF
V_REFIO
REFLO
+1.2V REF
REFIO
FS ADJ
R_SET I_REF =
V_REFIO/R_SET
AD9774
0.1␮F
REFCOMP
50pF
AVDD
CURRENT
SOURCE
ARRAY
REFERENCE
CONTROL
AMPLIFIER
Figure 28. External Reference Configuration
REFERENCE CONTROL AMPLIFIER
The AD9774 also contains an internal control amplifier that is
used to regulate the DAC’s full-scale output current, I_OUTFS.
The control amplifier is configured as a V-I converter, as shown
in Figure 28, such that its current output, I_REF, is determined by
the ratio of the V_REFIO and an external resistor, R_SET, as stated
in Equation 4. I_REF is copied over to the segmented current
sources with the proper scaling factor to set I_OUTFS as stated in
Equation 3.
The control amplifier allows a wide (10:1) adjustment span of
I_OUTFS over a 2 mA to 20 mA range by setting I_REF between
62.5 µA and 625 µA. The wide adjustment span of I_OUTFS
provides several application benefits. The first benefit relates
directly to the power dissipation of the AD9774, which is pro-
portional to I_OUTFS (refer to the Power Dissipation section). The
second benefit relates to the 20 dB adjustment, which is useful
for system gain control purposes.
There are two methods by which I_REF can be varied for a fixed
R_SET. The first method is suitable for a single-supply system in
which the internal reference is disabled, and the common-mode
voltage of REFIO is varied over its compliance range of 1.25 V
to 0.10 V. REFIO can be driven by a single-supply amplifier or
DAC, thus allowing I_REF to be varied for a fixed R_SET. Since the
input impedance of REFIO is approximately 1 MΩ, a simple,
low cost R-2R ladder DAC configured in the voltage mode
topology may be used to control the gain. This circuit is shown
in Figure 30 using the AD7524 and an external 1.2 V reference,
the AD1580.
The second method may be used in a dual-supply system in
which the common-mode voltage of REFIO is fixed, and I_REF is
varied by an external voltage, V_GC, applied to R_SET via an ampli-
fier. An example of this method is shown in Figure 29 in which
the internal reference is used to set the common-mode voltage
of the control amplifier to 1.20 V. The external voltage, V_GC, is
referenced to ACOM and should not exceed 1.2 V. The value of
R_SET is such that I_REFMAX and I_REFMIN do not exceed 62.5 µA
and 625 µA, respectively. The associated equations in Figure 29
can be used to determine the value of R_SET.
+2.7 TO +5.5V_A
REFLO
0.1␮F
REFCOMP
AVDD
+1.2V REF
REFIO
1␮F
FSADJ
R_{SET IREF}
AD9774
50pF
CURRENT
SOURCE
ARRAY
V_GC
I_REF = (1.2–V_GC)/R_SET
WITH V_GC Ͻ V_REFIO AND 62.5 ␮A Յ I_REF Յ 625A
Figure 29. Dual Supply Gain Control Circuit
ANALOG OUTPUTS
The AD9774 produces two complementary current outputs,
IOUTA and IOUTB, which may be configured for single-end or
differential operation. IOUTA and IOUTB can be converted
into complementary single-ended voltage outputs, V_OUTA and
V_OUTB, via a load resistor, R_LOAD, as described in the DAC
Transfer Function section by Equations 5 through 8. The
differential voltage, V_DIFF, existing between V_OUTA and V_OUTB,
can also be converted to a single-ended voltage via a transformer
or differential amplifier configuration.
Figure 31 shows the equivalent analog output circuit of the
AD9774 consisting of a parallel combination of PMOS differen-
tial current switches associated with each segmented current
source. The output impedance of IOUTA and IOUTB is deter-
mined by the equivalent parallel combination of the PMOS
switches and is typically 100 kΩ in parallel with 5 pF. Due to
the nature of a PMOS device, the output impedance is also
slightly dependent on the output voltage (i.e., V_OUTA and V_OUTB)
and, to a lesser extent, the analog supply voltage, AVDD, and
full-scale current, I_OUTFS. Although the output impedance’s
signal dependency can be a source of dc nonlinearity and ac linear-
ity (i.e., distortion), its effects can be limited if certain precau-
tions are noted.
AVDD
1.2V
AD1580
+2.7 TO +5.5V_A
REFLO
R_FB
V_DD
OUT1
AD7524
OUT2
V_REF
AGND
DB7–DB0
0.1V TO 1.2V
R_SET
I_REF =
V_REF/R_SET
+1.2V REF
REFIO
FSADJ
AD9774
0.1␮F
REFCOMP
AVDD
50pF
CURRENT
SOURCE
ARRAY
Figure 30. Single Supply Gain Control Circuit
REV. B
–13–