AD9613 Datasheet, PDF (13/36 Pages) Analog Devices – 12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)

Data Sheet
Pin No.
Digital Outputs
14
13
16
15
18
17
21
20
23
22
27
26
30
29
32
31
34
33
36
35
39
38
41
40
43
42
25
24
SPI Control
45
44
46
Output Enable Bar and
Power-Down
47
48
Mnemonic
D0+ (LSB)
D0− (LSB)
D1+
D1−
D2+
D2−
D3+
D3−
D4+
D4−
D5+
D5−
D6+
D6−
D7+
D7−
D8+
D8−
D9+
D9−
D10+
D10−
D11+ (MSB)
D11− (MSB)
OR+
OR−
DCO+
DCO−
SCLK
SDIO
CSB
AD9613
Type
Description
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Channel A/Channel B LVDS Output Data 0—True.
Channel A/Channel B LVDS Output Data 0—Complement.
Channel A/Channel B LVDS Output Data 1—True.
Channel A/Channel B LVDS Output Data 1—Complement.
Channel A/Channel B LVDS Output Data 2—True.
Channel A/Channel B LVDS Output Data 2—Complement.
Channel A/Channel B LVDS Output Data 3—True.
Channel A/Channel B LVDS Output Data 3—Complement.
Channel A/Channel B LVDS Output Data 4—True.
Channel A/Channel B LVDS Output Data 4—Complement.
Channel A/Channel B LVDS Output Data 5—True.
Channel A/Channel B LVDS Output Data 5—Complement.
Channel A/Channel B LVDS Output Data 6—True.
Channel A/Channel B LVDS Output Data 6—Complement.
Channel A/Channel B LVDS Output Data 7—True.
Channel A/Channel B LVDS Output Data 7—Complement.
Channel A/Channel B LVDS Output Data 8—True.
Channel A/Channel B LVDS Output Data 8—Complement.
Channel A/Channel B LVDS Output Data 9—True.
Channel A/Channel B LVDS Output Data 9—Complement.
Channel A/Channel B LVDS Output Data 10—True.
Channel A/Channel B LVDS Output Data 10—Complement.
Channel A/Channel B LVDS Output Data 11—True.
Channel A/Channel B LVDS Output Data 11—Complement.
Channel A/Channel B LVDS Overrange—True.
Channel A/Channel B LVDS Overrange—Complement.
Channel A/Channel B LVDS Data Clock Output—True.
Channel A/Channel B LVDS Data Clock Output—Complement.
Input
SPI Serial Clock.
Input/Output SPI Serial Data I/O.
Input
SPI Chip Select (Active Low).
OEB
PDWN
Input/Output
Input/Output
Output Enable Bar Input (Active Low).
Power-Down Input (Active High). Operation depends upon SPI mode;
this input can be configured as power-down or standby. For further
description, refer to Table 14.
Rev. C | Page 13 of 36