AD830_10 Datasheet, PDF (12/20 Pages) Analog Devices – High Speed, Video Difference Amplifier

AD830
V_X1
V_X2
G_M
I_X
I_Z
A=1
V_OUT
I_Y
V_Y1
G_M
V_Y2
I_X = (V_X1 – V_X2) G_M
I_Y = (V_Y1 – V_Y2) G_M
C_C
R_P ^{IZ = IX + IY}
A_OLS =
1
G_MR_P
+ S (C_CR_P)
Figure 26. Topology Diagram
V_X1
V_X2
G_M
I_X
I_Y
V_Y1
G_M
V_Y2
A=1
C_C
V_OUT
V_X1 – V_X2 = V_Y2 – V_Y1
FOR V_Y2 = V_OUT
V_OUT = (V_X1 – V_X2 + V_Y1)
1
1 + S(C_C/G_M)
Figure 27. Closed-Loop Connection
Precise amplification is accomplished through closed-loop
operation of this topology. Voltage feedback is implemented via
the Y GM stage where the output is connected to the −Y input
for negative feedback, as shown in Figure 27. An input signal is
applied across the X GM stage, either fully differential or single-
ended referred to common. It produces a current signal that is
summed at the high impedance node with the output current
from the Y GM stage. Negative feedback nulls this sum to a small
error current necessary to develop the output voltage at the high
impedance node. The error current is usually negligible, so the
null condition essentially forces the Y GM output stage current
to equal the exact X GM output current. Because the two
transconductances are identical, the differential voltage across
the Y inputs equals the negative of the differential voltage across
the X input; VY = −VX or, more precisely, VY2 − VY1 = VX1 − VX2.
This simple relation provides the basis to easily analyze any
function possible to synthesize with the AD830, including any
feedback situation.
The bandwidth of the circuit is defined by the GM and the
capacitor, CC. The highly linear GM stages give the amplifier a
single-pole response, excluding the output amplifier and
loading effects. It is important to note that the bandwidth and
general dynamic behavior is symmetrical (identical) for the
noninverting and the inverting connections of the AD830. In
addition, the input impedance and CMRR are the same for
either connection. This is very advantageous and unlike in a
voltage or current feedback amplifier where there is a distinct
difference in performance between the inverting and
noninverting gain. The practical importance of this cannot be
overemphasized and is a key feature offered by the AD830
amplifier topology.
INTERFACING THE INPUT
Common-Mode Voltage Range
The common-mode range of the AD830 is defined by the
amplitude of the differential input signal and the supply voltage.
The general definition of common-mode voltage, VCM, is
usually applied to a symmetrical differential signal centered
around a particular voltage, as illustrated in Figure 28. This is
the meaning implied here for common-mode voltage. The
internal circuitry establishes the maximum allowable voltage on
the input or feedback pins for a given supply voltage. This
constraint and the differential input voltage sets the common-
mode voltage limit. Figure 29 shows a curve of the common-
mode voltage range versus the differential voltage for three
supply voltage settings.
V_MAX
V_PEAK
V_CM
Figure 28. Common-Mode Definition
15
+V_CM
12
–V_CM
+V_CM
9
±15V = V_S
6
–V_CM
±10V = V_S
+V_CM
3
±5V = V_S
–V_CM
0
0
0.4
0.8
1.2
1.6
2.0
DIFFERENTIAL INPUT VOLTAGE (V_PEAK)
Figure 29. Input Common-Mode Voltage Range vs. Differential Input Voltage
Differential Voltage Range
The maximum applied differential voltage is limited by the
clipping range of the input stages. This is nominally set at a
2.4 V magnitude and depicted in the cross plot (X-Y) in Figure 30.
The useful linear range of the input stages is set at 2 V but is
actually a function of the distortion required for a particular
application. The distortion increases for larger differential input
voltages. A plot of relative distortion versus the input differential
voltage is shown in Figure 13 and Figure 16. The distortion
characteristics impose a secondary limit to the differential input
voltage for high accuracy applications.
Rev. C | Page 12 of 20