AD820_07 Datasheet, PDF (12/24 Pages) Analog Devices – Single-Supply, Rail-to-Rail, Low Power FET-Input Op Amp

AD820
100
100
80
80
PHASE
60
60
GAIN
40
40
20
20
0
R_L = 2kΩ
C_L = 100pF
–20
10
100
1k
0
–20
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 16. Open-Loop Gain and Phase Margin vs. Frequency
1k
A_CL = +1
V_S = ±15V
100
10
1
0.1
0.01
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 17. Output Impedance vs. Frequency
16
12
1%
8
4
0
0.1%
0.01%
ERROR
–4
–8
1%
–12
–16
0
1
2
3
4
5
SETTLING TIME (µs)
Figure 18. Output Swing and Error vs. Settling Time
100
90
80
70
60
V_S = 0V, +5V
V_S = ±15V
50
40
30
20
10
0
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 19. Common-Mode Rejection vs. Frequency
5
4
3
NEGATIVE
RAIL
POSITIVE
RAIL
2
+25ºC
1
+125ºC
+125ºC
–55ºC
–55ºC
0
–1
0
1
2
3
COMMON-MODE VOLTAGE FROM SUPPLY RAILS (V)
Figure 20. Absolute Common-Mode Error vs. Common-Mode Voltage
from Supply Rails (VS − VCM)
1k
100
V_S – V_OH
V_OL – V_S
10
1
0.001
0.01
0.1
1
10
100
LOAD CURRENT (mA)
Figure 21. Output Saturation Voltage vs. Load Current
Rev. E | Page 12 of 24