AD5620_15 Datasheet, PDF (12/28 Pages) Analog Devices – Single, 12-/14-/16-Bit nanoDAC with 5 ppm/C On-Chip Reference in SOT-23

AD5620/AD5640/AD5660
12
10 ^{VDD = 5V}
8
6
MAX INL
4
2
MAX DNL
0
–2
MIN DNL
–4
–6
–8
MIN INL
–10
–12
–40 –20
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 18. INL Error and DNL Error vs. Temperature
0.4
V_DD = 5V
0.2
GAIN ERROR
0
FULL SCALE ERROR
–0.2
–0.4
–40 –20
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 19. Gain Error and Full-Scale Error vs. Temperature
1.6
V_DD = 5V
1.4
1.2
1.0
ZERO CODE ERROR
0.8
0.6
0.4
OFFSET ERROR
0.2
0
–40 –20
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 20. Zero-Code and Offset Error vs. Temperature
Data Sheet
200
180
160
140
120
100
80
60
40
V_DD = 3.3V
20
0
I_DD (mA)
Figure 21. IDD Histogram
V_DD = 5V
T_A = 25°C
0.50
DAC LOADED WITH
0.40
FULL-SCALE
SOURCING CURRENT
0.30
DAC LOADED WITH
ZERO-SCALE
SINKING CURRENT
0.20
0.10
0
V_DD = 3V
V_REFOUT = 1.25V
–0.10
–0.20
–0.30
–0.40
V_DD = 5V
V_REFOUT = 2.5V
–0.50
–10 –8 –6 –4 –2 0 2 4 6 8 10
CURRENT (mA)
Figure 22. Headroom at Rails vs. Source and Sink
6.00
5.00
V_DD = 5V
V_REFOUT = 2.5V
T_A = 25°C
4.00
FULL SCALE
3/4 SCALE
3.00
MIDSCALE
2.00
1/4 SCALE
1.00
0
ZERO SCALE
–1.00
–30
–20
–10
0
10
20
30
CURRENT (mA)
Figure 23. Source and Sink Capability—AD5660-2/AD5660-3
Rev. G | Page 12 of 28