ADA4851-2_15 Datasheet, PDF (11/25 Pages) Analog Devices – Low Cost, High Speed, Rail-to-Rail, Output Op Amps

ADA4851-1/ADA4851-2/ADA4851-4
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Supply Voltage
Power Dissipation
Common-Mode Input Voltage
Differential Input Voltage
Storage Temperature Range
Operating Temperature Range
Lead Temperature
Junction Temperature
Rating
12.6 V
See Figure 5
−VS − 0.5 V to +VS + 0.5 V
+VS to −VS
−65°C to +125°C
−40°C to +125°C
JEDEC J-STD-20
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions; that is, θJA is specified
for device soldered in circuit board for surface-mount packages.
Table 5. Thermal Resistance
Package Type
θJA
6-lead SOT-23
170
8-lead MSOP
150
14-lead TSSOP
120
Unit
°C/W
°C/W
°C/W
Maximum Power Dissipation
The maximum safe power dissipation for the ADA4851-1/
ADA4851-2/ADA4851-4 is limited by the associated rise in
junction temperature (TJ) on the die. At approximately 150°C,
which is the glass transition temperature, the plastic changes its
properties. Even temporarily exceeding this temperature limit
may change the stresses that the package exerts on the die,
permanently shifting the parametric performance of the
amplifiers. Exceeding a junction temperature of 150°C for an
extended period can result in changes in silicon devices,
potentially causing degradation or loss of functionality.
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the die
due to the drive of the amplifier at the output. The quiescent
power is the voltage between the supply pins (VS) times the
quiescent current (IS).
PD = Quiescent Power + (Total Drive Power − Load Power)
P_D
= (V_S
×
I
S
)
+
⎜⎛
⎝
V_S
2
× ^VOUT
R_L
⎟⎞ – ^VOUT2
⎠ ^RL
RMS output voltages should be considered. If RL is referenced
to −VS, as in single-supply operation, the total drive power is
VS × IOUT. If the rms signal levels are indeterminate, consider the
worst case, when VOUT = VS/4 for RL to midsupply.
P_D
=
(V_S
×
I_S
)+
(V_S / 4 )²
R_L
In single-supply operation with RL referenced to −VS, the worst
case is VOUT = VS/2.
Airflow increases heat dissipation, effectively reducing θJA.
In addition, more metal directly in contact with the package
leads and through holes under the device reduces θJA.
Figure 5 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 6-lead SOT-23
(170°C/W), the 8-lead MSOP (150°C/W), and the 14-lead
TSSOP (120°C/W) on a JEDEC standard 4-layer board. θJA
values are approximations.
2.0
TSSOP
1.5
MSOP
1.0
SOT-23-6
0.5
0
–55 –45 –35 –25 –15 –5 5 15 25 35 45 55 65 75 85 95 105 115 125
AMBIENT TEMPERATURE (°C)
Figure 5. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
Rev. J | Page 10 of 24