AD9212_11 Datasheet, PDF (11/56 Pages) Analog Devices – Octal, 10-Bit, 40 MSPS/65 MSPS, Serial LVDS, 1.8 V ADC

Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AVDD 1
VIN + G 2
VIN – G 3
AVDD 4
VIN – H 5
VIN + H 6
AVDD 7
AVDD 8
CLK– 9
CLK+ 10
AVDD 11
AVDD 12
DRGND 13
DRVDD 14
D – H 15
D + H 16
PIN 1
INDICATOR
EXPOSED PADDLE, PIN 0
(BOTTOM OF PACKAGE)
AD9212
TOP VIEW
(Not to Scale)
48 AVDD
47 VIN + B
46 VIN – B
45 AVDD
44 VIN – A
43 VIN + A
42 AVDD
41 PDWN
40 CSB
39 SDIO/ODM
38 SCLK/DTP
37 AVDD
36 DRGND
35 DRVDD
34 D + A
33 D – A
NOTES
1. THE EXPOSED PAD MUST BE CONNECTED TO ANALOG GROUND
Figure 5. 64-Lead LFCSP Pin Configuration, Top View
Table 7. Pin Function Descriptions
Pin No.
Mnemonic
0
AGND
1, 4, 7, 8, 11,
12, 37, 42, 45,
48, 51, 59, 62
AVDD
13, 36
DRGND
14, 35
DRVDD
2
VIN + G
3
VIN − G
5
VIN − H
6
VIN + H
9
CLK−
10
CLK+
15
D−H
16
D+H
17
D−G
18
D+G
19
D−F
20
D+F
21
D−E
22
D+E
23
DCO−
24
DCO+
25
FCO−
26
FCO+
27
D−D
28
D+D
29
D−C
30
D+C
31
D−B
Description
Analog Ground (Exposed Paddle)
1.8 V Analog Supply
Digital Output Driver Ground
1.8 V Digital Output Driver Supply
ADC G Analog Input True
ADC G Analog Input Complement
ADC H Analog Input Complement
ADC H Analog Input True
Input Clock Complement
Input Clock True
ADC H Digital Output Complement
ADC H Digital Output True
ADC G Digital Output Complement
ADC G Digital Output True
ADC F Digital Output Complement
ADC F Digital Output True
ADC E Digital Output Complement
ADC E Digital Output True
Data Clock Digital Output Complement
Data Clock Digital Output True
Frame Clock Digital Output Complement
Frame Clock Digital Output True
ADC D Digital Output Complement
ADC D Digital Output True
ADC C Digital Output Complement
ADC C Digital Output True
ADC B Digital Output Complement
Rev. E | Page 11 of 56
AD9212