AD8571 Datasheet, PDF (11/19 Pages) Analog Devices – Zero-Drift, Single-Supply, Rail-to-Rail Input/Output Operational Amplifiers

AD8571/AD8572/AD8574
V_IN+
V_IN؊
⌽B
⌽A
V_OSA
+
V_OA
A_A
A_B
V_OUT
B_B
⌽B
C_M2
V_NB
؊B_{A ⌽A}
C_M1
V_NA
Figure 45. Output Phase of the Amplifier
Because φA is now open and there is no place for C_M1 to dis-
charge, the voltage V_NA at the present time t is equal to the
voltage at the output of the nulling amp V_OA at the time when
φA was closed. If we call the period of the autocorrection
switching frequency T_S, then the amplifier switches between
phases every 0.5␣ ϫ␣ T_S. Therefore, in the amplification phase:
[ ] ^VNA ^t
= V_NA
_t
−
1
2
T_S


(4)
And substituting Equation 4 and Equation 2 into Equation 3 yields:
[ ] [ ] [ ] ^VOA ^t
= A_AV_IN
t
+ A_AV_OSA t
−
A_AB_AV_OSA ^{}t
−
1
2
T_S


1 + B_A
(5)
For the sake of simplification, let us assume that the autocorrection
frequency is much faster than any potential change in V_OSA or
V_OSB. This is a good assumption since changes in offset voltage are
a function of temperature variation or long-term wear time, both of
which are much slower than the auto-zero clock frequency of the
AD857x. This effectively makes V_OS time invariant and we can
rearrange Equation 5 and rewrite it as:
[ ] [ ] ^{( ) V}OA ^{t = A}A^VIN ^{t + AA 1 + BA}
V_OSA − A_AB_AV_OSA
1 + B_A
(6)
or,
[ ] [ ] ^VOA ^t
=

A_{A }V_IN
t
+
V_OSA
1 + B_A


(7)
We can already get a feel for the autozeroing in action. Note the
V_OS term is reduced by a 1 + B_A factor. This shows how the
nulling amplifier has greatly reduced its own offset voltage error
even before correcting the primary amplifier. Now the primary
amplifier output voltage is the voltage at the output of the
AD857x amplifier. It is equal to:
[ ] ( [ ] ) ^VOUT ^{t = A}B ^VIN ^{t +V}OSB ^{+ B}B^VNB
(8)
In the amplification phase, V_OA = V_NB, so this can be rewritten as:
[ ] [ ] [ ] ^VOUT ^t
= A_BV_IN t
+
A_BV_OSB
+
B_B



A_A

^VIN
t
+
V_OSA
1 + B_A





(9)
Combining terms,
[ ] [ ]( ) ^VOUT ^{t =V}IN ^t
A_B + A_AB_B
+
A_AB_BV_OSA
1 + B_A
+
A_BV_OSB
(10)
The AD857x architecture is optimized in such a way that
A_A = A_B and B_A = B_B and B_A >> 1. Also, the gain product to
A_AB_B is much greater than A_B. These allow Equation 10 to be
simplified to:
[ ] [ ] ( ) ^VOUT ^{t ≈V}IN ^{t A}A^BA ^{+ A}A ^VOSA ^+VOSB
(11)
Most obvious is the gain product of both the primary and nulling
amplifiers. This A_AB_A term is what gives the AD857x its extremely
high open-loop gain. To understand how V_OSA and V_OSB relate to
the overall effective input offset voltage of the complete amplifier,
we should set up the generic amplifier equation of:
( ) ^V_OUT ^{= k × V}_IN ^+V_{OS, EFF}
(12)
Where k is the open-loop gain of an amplifier and V_{OS, EFF} is its
effective offset voltage. Putting Equation 12 into the form of
Equation 11 gives us:
[ ] [ ] ^VOUT ^{t ≈V}IN ^{t A}A^BA ^+VOS, EFF ^AA^BA
(13)
And from here, it is easy to see that:
V_{OS ,}
EFF
≈ ^{VOSA +VOSB}
B_A
(14)
Thus, the offset voltages of both the primary and nulling ampli-
fiers are reduced by the gain factor B_A. This takes a typical input
offset voltage from several millivolts down to an effective input
offset voltage of submicrovolts. This autocorrection scheme is
what makes the AD857x family of amplifiers among the most
precise amplifiers in the world.
High Gain, CMRR, PSRR
Common-mode and power supply rejection are indications of the
amount of offset voltage an amplifier has as a result of a change in its
input common-mode or power supply voltages. As shown in the
previous section, the autocorrection architecture of the AD857x
allows it to quite effectively minimize offset voltages. The technique
also corrects for offset errors caused by common-mode voltage
swings and power supply variations. This results in superb CMRR
and PSRR figures in excess of 130 dB. Because the autocorrection
occurs continuously, these figures can be maintained across the
device’s entire temperature range, from –40°C to +125°C.
Maximizing Performance Through Proper Layout
To achieve the maximum performance of the extremely high
input impedance and low offset voltage of the AD857x, care
should be taken in the circuit board layout. The PC board sur-
face must remain clean and free of moisture to avoid leakage
currents between adjacent traces. Surface coating of the circuit
board will reduce surface moisture and provide a humidity
barrier, reducing parasitic resistance on the board. The use of
guard rings around the amplifier inputs will further reduce leak-
age currents. Figure 46 shows how the guard ring should be
configured and Figure 47 shows the top view of how a surface
mount layout can be arranged. The guard ring does not need to
be a specific width, but it should form a continuous loop around
both inputs. By setting the guard ring voltage equal to the volt-
age at the noninverting input, parasitic capacitance is minimized
as well. For further reduction of leakage currents, components
can be mounted to the PC board using Teflon standoff insulators.
REV. 0
–11–