ADV7184 Datasheet, PDF (106/108 Pages) Analog Devices – Multiformat SDTV Video Decoder with Fast Switch Overlay Support

ADV7184
DIGITAL INPUTS
The digital inputs on the ADV7184 are designed to work with
3.3 V signals, and are not tolerant of 5 V signals. Extra
components are needed if 5 V logic signals are required to be
applied to the decoder.
XTAL AND LOAD CAPACITOR VALUES SELECTION
Figure 49 shows an example reference clock circuit for the
ADV7184. Special care must be taken when using a crystal
circuit to generate the reference clock for the ADV7184. Small
variations in reference clock frequency may cause autodetection
issues and impair the ADV7184 performance.
XTAL
28.63636MHz
C1 = 47pF
R = 1MΩ
C2 = 47pF
Figure 49. Crystal Circuit
Use the following guidelines to ensure correct operation:
• Use the correct, 28.63636 MHz, frequency crystal.
Tolerance should be 50 ppm or better.
• User a parallel-resonant crystal.
• Know the Cload for the crystal part selected. The values of
the C1 and C2 capacitors must be calculated using this Cload
value.
To find C1 and C2, use the following formula:
C = 2(Cload − Cstray) − Cpg
where Cstray is usually 2 pF to 3 pF, depending on board traces,
and Cpg (pin-to-ground capacitance) is 4 pF for the ADV7184.
Example:
Cload = 30 pF. C1 = 50 pF, C2 = 50 pF (in this case 47 pF is the
nearest real-life cap value to 50 pF)
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