ADV212 Datasheet, PDF (10/44 Pages) Analog Devices – JPEG 2000 Video Codec

ADV212
DREQ/DACK DMA MODE—SINGLE FIFO READ OPERATION
Table 7.
Parameter
DREQ Pulse Width
DACK Assert to Subsequent DREQ Delay
RD to DACK Setup
DACK to Data Valid
Data Hold
DACK Assert Pulse Width
DACK Deassert Pulse Width
RD Hold after DACK Deassert
RD Assert to FSRQ Deassert (FIFO Empty)
DACK to DREQ Deassert (DR × PULS = 0)
1 _{For a definition of JCLK, see Figure 32.}
Mnemonic
DREQPULSE
t_DREQ
t_RDSU
t_RD
tHD
DACKLO
DACKHI
t_RDHD
RDFSRQ
t_DREQRTN
Min
1 JCLK ¹
2.5 JCLK
0
2.5
1.5
2 JCLK
2 JCLK
0
1.5 JCLK
2.5 JCLK
Typ Max
15 JCLK
3.5 × JCLK + 9.0
11
2.5 × JCLK + 9.0
3.5 × JCLK + 9.0
DREQ
DACK
RD
HDATA
DREQ_PULSE
t_DREQ
DACK_LO
DACK_HI
t_RDSU
t_RDHD
t_RD
t_HD
0
1
2
Figure 9. Single Read for DREQ/DACK DMA Mode for Assigned DMA Channel
(EDMOD0/EDMOD1 <14:11> Not Programmed to a Value of 0000)
DREQ
DACK
RD
HDATA
t_DREQRTN
DACK_LO
DACK_HI
t_RDSU
t_RDHD
t_RD
t_HD
0
1
2
Figure 10. Single Read for DREQ/DACK DMA Mode for Assigned DMA Channel
(EDMOD0/EDMOD1 <14:11> Programmed to a Value of 0000)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev. 0 | Page 10 of 44