AD9822_15 Datasheet, PDF (10/20 Pages) Analog Devices – Complete 14-Bit CCD/CIS Signal Processor

AD9822
ANALOG
INPUTS
CDSCLK2
ADCCLK
OUTPUT
DATA
D<7:0>
t_ADCLK
PIXEL N (R, G, B)
t_AD
t_C2
t_C2ADF
t_ADC2
t_C2ADR
PIXEL (N + 1)
t_PRA
t_ADCLK
t_OD
R (N– 2) G (N– 2) G (N– 2) B (N– 2) B (N– 2) R (N– 1) R (N– 1) G (N– 1) G (N– 1) B (N– 1) B (N– 1) R (N)
R (N)
G (N)
G (N)
HIGH LOW HIGH LOW HIGH LOW HIGH LOW HIGH LOW HIGH LOW HIGH LOW
BYTE BYTE BYTE BYTE BYTE BYTE BYTE BYTE BYTE BYTE BYTE BYTE BYTE BYTE
Figure 5. 3-Channel SHA Mode Timing
ANALOG
INPUTS
CDSCLK2
ADCCLK
OUTPUT
DATA
D<7:0>
PIXEL (N – 4)
HIGH BYTE
PIXEL N
t_AD
t_C2
t_PRB
t_C2ADR
t_ADCLK
PIXEL (N – 4)
LOW BYTE
t_C2ADF
t_ADCLK
t_OD
PIXEL (N – 3)
HIGH BYTE
PIXEL (N – 3)
LOW BYTE
PIXEL (N – 2)
HIGH BYTE
Figure 6. 1-Channel SHA Mode Timing
PIXEL (N – 2)
LOW BYTE
Rev. B | Page 10 of 20