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AD8318_15 Datasheet, PDF (10/24 Pages) Analog Devices – 1 MHz to 8 GHz, 70 dB Logarithmic Detector/Controller
AD8318
j1
j0.5
j2
j0.2
0
–j0.2
0.2
0.5
1
8GHz
5.8GHz
2
0.1GHz
0.9GHz
1.9GHz
–j0.5
3.6GHz
2.2GHz
–j2
START FREQUENCY = 0.1GHz
STOP FREQUENCY = 8GHz
–j1
Figure 16. Input Impedance vs. Frequency; No Termination Resistor on
INHI, ZO = 50 Ω
0.07
0.06
0.05
0.04
DECREASING VENBL
0.03
INCREASING VENBL
0.02
0.01
0
1.4
1.5
1.6
1.7
1.8
VENBL (V)
Figure 17. Supply Current vs. Enable Voltage
VOUT
200mV/VERTICAL
DIVISION
GND
PULSED RF INPUT 0.1GHz,
–10dBm
20ns PER HORIZONTAL DIVISION
Figure 18. VOUT Pulse Response Time; Pulsed RF Input 0.1 GHz, –10 dBm;
CLPF = Open
10k
RF OFF
1k
–60dBm
–40dBm
–20dBm
100
–10dBm
0dBm
10
1
3 10 30 100 300 1k 3k 10k
FREQUENCY (kHz)
Figure 19. Noise Spectral Density of Output; CLPF = Open
1k
100
10
1
3 10 30 100 300 1k 3k 10k
FREQUENCY (kHz)
Figure 20. Noise Spectral Density of Output Buffer (from CLPF to VOUT);
CLPF = 0.1 μF
2.2
2.0
2.0
1.6
1.8
1.2
1.6
0.8
1.4
0.4
1.2
0
1.0
–0.4
0.8
–0.8
0.6
–1.2
0.4
–1.6
0.2
–2.0
–65 –55 –45 –35 –25 –15 –5
5
15
PIN (dBm)
Figure 21. Output Voltage Stability vs. Supply Voltage at 1.9 GHz
When VP Varies by 10%, Multiple Devices
Rev. B | Page 10 of 24