UG-127 Datasheet, PDF (1/8 Pages) Analog Devices – Evaluation Board for High Speed Op Amps

Evaluation Board User Guide
UG-127
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: [phone] • Fax: [phone] • www.analog.com
Evaluation Board for High Speed Op Amps
Offered in 5-Lead SOT-23 and 6-Lead SOT-23 Packages
FEATURES
Enables quick breadboarding/prototyping
User-defined circuit configuration
Edge-mounted SMA connector provisions
Easy connection to test equipment and other circuits
RoHs compliant
GENERAL DESCRIPTION
The Analog Devices, Inc., 5-lead and 6-lead, SOT-23 high speed
evaluation board is designed to help customers quickly prototype
new op amp circuits and reduce design time. The evaluation
board can be used with almost any Analog Devices op amp in
various configurations and applications. The evaluation board
is a bare board (that is, there are no components or amplifiers
soldered to the board, these must be ordered separately).
Figure 1 shows the component side of the evaluation board,
and Figure 2 shows the circuit side of the evaluation board.
The evaluation board is a 2-layer PCB that accepts SMA con-
nectors on the input and output for efficient connection to test
equipment. The evaluation board can also accommodate an
SMA connector for the disable pin.
The ground plane, component placement, and supply bypassing
are laid out to minimize parasitic inductances and capacitances.
The evaluation board components are primarily SMT 1206 case
size, with the exception of the electrolytic bypass capacitors (C1,
C4), which are 3528 case size.
There are two options for supply bypassing. The first is connecting
additional shunt capacitors (C2, C5) in parallel with the electrolytic
capacitors (C1, C4) from each supply to ground. This technique
of power supply bypassing provides wideband rejection of
unwanted noise on the supply lines.
The second approach to supply bypassing is to connect one
capacitor (C6) between the supply rails. This method uses fewer
components and can improve the PSRR at higher frequencies.
Optimal bypassing is circuit dependent and therefore must be
evaluated by the designer.
Figure 3 shows the evaluation board schematic. Figure 4 and
Figure 6 show the evaluation board assembly drawings. The
PCB layout pattern for the component side and the circuit side
is shown in Figure 5 and Figure 7.
EVALUATION BOARD, COMPONENT AND CIRCUIT SIDES
NOTES
1. THE EVALUATION BOARD SILKSCREEN PART NUMBER
LABELING ON YOUR BOARD MAY BE DIFFERENT FROM
WHAT IS SHOWN HERE.
Figure 1. Component Side of Evaluation Board
NOTES
1. THE EVALUATION BOARD SILKSCREEN PART NUMBER
LABELING ON YOUR BOARD MAY BE DIFFERENT FROM
WHAT IS SHOWN HERE.
Figure 2. Circuit Side of Evaluation Board
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Rev. A | Page 1 of 8