SSM2304_15 Datasheet, PDF (1/20 Pages) Analog Devices – 2 W Filterless Class-D Stereo Audio Amplifier

2 W Filterless Class-D
Stereo Audio Amplifier
SSM2304
FEATURES
Filterless Class-D amplifier with built-in output stage
2 W into 4 Ω and 1.4 W into 8 Ω at 5.0 V supply with <10% THD
85% efficiency at 5.0 V, 1.4 W into 8 Ω speaker
Better than 98 dB SNR (signal-to-noise ratio)
Available in 16-lead, 3 mm × 3 mm LFCSP
Single-supply operation from 2.5 V to 5.0 V
20 nA ultralow shutdown current
Short-circuit and thermal protection
Pop-and-click suppression
Built-in resistors reduce board component count
Default fixed 18 dB gain and user-adjustable
APPLICATIONS
Notebooks and PCs
Mobile phones
MP3 players
Portable gaming
Portable electronics
Educational toys
GENERAL DESCRIPTION
The SSM2304 is a fully integrated, high efficiency, Class-D stereo
audio amplifier. It is designed to maximize performance for
portable applications. The application circuit requires a mini-
mum of external components and operates from a single 2.5 V
to 5.0 V supply. It is capable of delivering 2 W of continuous
output power with less than 10% THD + N driving a 4 Ω load
from a 5.0 V supply.
The SSM2304 features a high efficiency, low noise modulation
scheme. It operates with 85% efficiency at 1.4 W into 8 Ω from a
5.0 V supply and has a signal-to-noise ratio (SNR) that is better
than 98 dB. PDM modulation is used to provide lower EMI-
radiated emissions compared with other Class-D architectures.
The SSM2304 has a micropower shutdown mode with a typical
shutdown current of 20 nA. Shutdown is enabled by applying a
logic low to the SD pin.
The architecture of the device allows it to achieve a very low level
of pop and click. This minimizes voltage glitches at the output
during turn-on and turn-off, thus reducing audible noise on
activation and deactivation.
The fully differential input of the SSM2304 provides excellent
rejection of common-mode noise on the input. Input coupling
capacitors can be omitted if the dc input common-mode voltage
is approximately VDD/2.
The SSM2304 also has excellent rejection of power supply noise,
including noise caused by GSM transmission bursts and RF
rectification.
The SSM2304 has a preset gain of 18 dB, which can be reduced
by using external resistors.
The SSM2304 is specified over the commercial temperature range
(−40°C to +85°C). It has built-in thermal shutdown and output
short-circuit protection. It is available in a 16-lead, 3 mm × 3 mm
lead-frame chip scale package (LFCSP).
FUNCTIONAL BLOCK DIAGRAM
10µF
0.1µF
22nF¹
RIGHT IN+
RIGHT IN–
22nF¹
Rext
Rext
SSM2304 300kΩ
47kΩ
INR+
INR– _47kΩ
VDD
MODULATOR
300kΩ
SHUTDOWN
SD
22nF¹ _Rext
LEFT IN+
LEFT IN–
22nF^{1 Rext}
GAIN = 300kΩ/(47kΩ + Rext)
INL+
INL–
BIAS
300kΩ
47kΩ
47kΩ
300kΩ
INTERNAL
OSCILLATOR
MODULATOR
GND
1 _{INPUT CAPS ARE OPTIONAL IF INPUT DC COMMON-MODE}
VOLTAGE IS APPROXIMATELY V_DD/2.
Figure 1.
VBATT
2.5V TO 5.0V
VDD
FET
DRIVER
OUTR+
OUTR–
FET
DRIVER
OUTL+
OUTL–
GND
Rev. 0
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