MT-085 Datasheet, PDF (1/9 Pages) Analog Devices – Fundamentals of Direct Digital Synthesis (DDS)

MT-085
TUTORIAL
Fundamentals of Direct Digital Synthesis (DDS)
FUNDAMENTAL DDS ARCHITECTURE
With the widespread use of digital techniques in instrumentation and communications systems, a
digitally-controlled method of generating multiple frequencies from a reference frequency source
has evolved called Direct Digital Synthesis (DDS). The basic architecture is shown in Figure 1.
In this simplified model, a stable clock drives a programmable-read-only-memory (PROM)
which stores one or more integral number of cycles of a sinewave (or other arbitrary waveform,
for that matter). As the address counter steps through each memory location, the corresponding
digital amplitude of the signal at each location drives a DAC which in turn generates the analog
output signal. The spectral purity of the final analog output signal is determined primarily by the
DAC. The phase noise is basically that of the reference clock.
Because a DDS system is a sampled data system, all the issues involved in sampling must be
considered: quantization noise, aliasing, filtering, etc. For instance, the higher order harmonics of
the DAC output frequencies fold back into the Nyquist bandwidth, making them unfilterable,
whereas, the higher order harmonics of the output of PLL-based synthesizers can be filtered.
There are other considerations which will be discussed shortly.
CLOCK
fc
ADDRESS
COUNTER
SIN
LOOKUP
TABLE
N-BITS
REGISTER
N-BITS
LOOKUP TABLE CONTAINS SINE
DATA FOR INTEGRAL NUMBER
OF CYCLES
DAC
fout
LPF
Figure 1 : Fundamental Direct Digital Synthesis System
Rev.0, 10/08, WK
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