ADV7202KSTZ Datasheet, PDF (1/28 Pages) Analog Devices – Simultaneous Sampling Video Rate Codec

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FEATURES
Four 10-Bit Video DACs (4:2:2, YCrCb, RGB I/P
Supported)
10-Bit Video Rate Digitization at up to 54 MHz
AGC Control (؎6 dB)
Front End 3-Channel Clamp Control
Up to Five CVBS Input Channels, Two Component YUV,
Three S-Video, or a Combination of the Above. Simul-
taneous Digitization of Two CVBS Input Channels
Aux 8-Bit SAR ADC @ 843 kHz Sampling Giving up to
Eight General-Purpose Inputs
I²C Compatible Interface with I²C Filter
RGB Inputs for Picture-on-Picture of the RGB DACs
Optional Internal Reference
Power Save Mode
APPLICATIONS
Picture-on-Picture Video Systems
Simultaneous Video Rate Processing
Hybrid Set-Top Box TV Systems
Direct Digital Synthesis/I-Q Demodulation
Image Processing
Simultaneous Sampling
Video Rate Codec
ADV7202
GENERAL DESCRIPTION
The ADV7202 is a video rate sampling codec.
It has the capability of sampling up to five NTSC/PAL/SECAM
video I/P signals. The resolution on the front end digitizer is
12 bits; 2 bits (12 dB) are used for gain and offset adjustment.
The digitizer has a conversion rate of up to 54 MHz.
The ADV7202 can have up to eight auxiliary inputs that can be
sampled by an 843 kHz SAR ADC for system monitoring.
The back end consists of four 10-bit DACs that run at up to
200 MHz and can be used to output CVBS, S-Video, Component
YCrCb, and RGB.
This codec also supports Picture-on-Picture.
The ADV7202 can operate at 3.3 V or 5 V. Its monolithic CMOS
construction ensures greater functionality with lower power
dissipation.
The ADV7202 is packaged in a small 64-lead LQFP package.
FUNCTIONAL BLOCK DIAGRAM
DOUT DAC_DATA
XTAL ^[9:0]
[9:0]
OSD I/P “S”
AIN1P
AIN1M
AIN2P
AIN2M
AIN3P
AIN3M
AIN4P
AIN4M
AIN5P
AIN5M
AIN6P
AIN6M
II//PP
MUX
SHA AND
CLAMP
SHA AND
CLAMP
SHA AND
CLAMP
MUX
ADC BLOCK
12-B1IT2-BIT
AA//DD
AA//DD
8-BIT 843kHz
ADV7202
ADC
DAC
LOGIC LOGIC
10-BIT
D/A
10-BIT
D/A
10-BIT
D/A
10-BIT
D/A
I²C
DAC0
DAC1
DAC2
DAC3
REV. 0
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© Analog Devices, Inc., 2002