ADUM3480 Datasheet, PDF (1/20 Pages) Analog Devices – Small, 3.75 kV RMS Quad Digital Isolators

Data Sheet
Small, 3.75 kV RMS Quad Digital Isolators
ADuM3480/ADuM3481/ADuM3482
FEATURES
Up to 25 Mbps data rate (NRZ)
Low propagation delay: 25 ns typical
Low dynamic power consumption
1.8 V to 5 V level translation
High temperature operation: 125°C
High common-mode transient immunity: >25 kV/µs
Output default select
20-lead, RoHS-compliant, SSOP package
Safety and regulatory approvals (pending):
UL recognition: 3750 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
VDE certificate of conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM = 560 V peak
APPLICATIONS
General-purpose multichannel isolation
SPI interface/data converter isolation
Industrial field bus isolation
GENERAL DESCRIPTION
The ADuM3480/ADuM3481/ADuM3482¹ are quad-channel
digital isolators based on the Analog Devices, Inc., iCoupler®
technology. Combining high speed CMOS and monolithic air
core transformer technology, these isolation components provide
outstanding performance characteristics superior to alternatives
such as optocoupler devices and other integrated couplers. With
typical propagation delay reduced to 25 ns, pulse width
distortion is also halved.
The four channels of the ADuM3480/ADuM3481/ADuM3482
are available in a variety of channel configurations with two data
rate grades up to 25 Mbps (see the Ordering Guide section). All
models use separate core and I/O power supplies. The core
operates between 3.0 V and 5.5 V, whereas the I/O supply can
range from 1.8 V to 5.5 V. If I/O operation is required within
the range of the core supply, the two supplies can be tied together
to allow single-supply operation. When the I/O must interface
with logic levels that are different from the core supply voltage,
the I/O supply operates independently of the core supply over
its wider range. The minimum I/O supply voltage is 1.8 V, which
allows compatibility with low voltage logic. Both core and I/O
supplies are required for proper operation.
FUNCTIONAL BLOCK DIAGRAMS
V_DDL1 1
GND₁ 2
V_IA 3
V_IB 4
V_IC 5
V_ID 6
NC 7
ADuM3480
ENCODE
ENCODE
ENCODE
ENCODE
V_DD1 8
V_DDC1 9
GND₁ 10
REG
DECODE
DECODE
DECODE
DECODE
REG
20 V_DDL2
19 GND₂
18 V_OA
17 V_OB
16 V_OC
15 V_OD
14 CTRL₂
13 V_DD2
12 V_DDC2
11 GND₂
Figure 1. ADuM3480
ADuM3481
V_DDL1 1
GND₁ 2
V_IA 3
ENCODE
V_IB 4
ENCODE
V_IC 5
ENCODE
V_OD 6
DECODE
CTRL₁ 7
V_DD1 8 REG
V_DDC1 9
GND₁ 10
DECODE
DECODE
DECODE
ENCODE
REG
20 V_DDL2
19 GND₂
18 V_OA
17 V_OB
16 V_OC
15 V_ID
14 CTRL₂
13 V_DD2
12 V_DDC2
11 GND₂
Figure 2. ADuM3481
ADuM3482
V_DDL1 1
GND₁ 2
V_IA 3
ENCODE
V_IB 4
ENCODE
V_OC 5
DECODE
V_OD 6
DECODE
CTRL₁ 7
V_DD1 8 REG
V_DDC1 9
GND₁ 10
DECODE
DECODE
ENCODE
ENCODE
REG
20 V_DDL2
19 GND₂
18 V_OA
17 V_OB
16 V_IC
15 V_ID
14 CTRL₂
13 V_DD2
12 V_DDC2
11 GND₂
Figure 3. ADuM3482
1 _{Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.}
Rev. 0
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