ADSP-BF522C Datasheet, PDF (1/12 Pages) Analog Devices – Embedded Processor

a
Blackfin^®
Embedded Processor
Preliminary Technical Data _{ADSP-BF522C/ADSP-BF525C/ADSP-BF527C}
FEATURES
Up to 600 MHz high-performance Blackfin processor
Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs,
40-bit shifter
RISC-like register and instruction model for ease of
programming and compiler-friendly support
Advanced debug, trace, and performance monitoring
tbd V to tbd V core V_DD with on-chip voltage regulation
1.8V, 2.5V, or 3.3V I/O operation
Embedded low power audio CODEC
289-ball MBGA package
MEMORY
132K bytes of on-chip memory:
48K bytes of instruction SRAM
16K bytes of instruction SRAM/cache
32K bytes of data SRAM
32K bytes of data SRAM/cache
4K bytes of scratchpad SRAM
External memory controller with glueless support for SDRAM
and asynchronous 8-bit and 16-bit memories
Nand flash controller
Flexible booting options from external flash, SPI and TWI
memory or from SPI, TWI, and UART host devices
One-time programmable memory for security
Two dual-channel memory DMA controllers
Memory management unit providing memory protection
PERIPHERALS
Refer to the published ADSP-BF522/ADSP-BF525/ADSP-
BF527 Revision PrB datasheet for additional peripherals
CODEC FEATURES
Stereo 24-bit A/D and D/A converters
DAC
100 dB (A-weighted) signal-to-noise ratio at 3.3 V
95 dB (A-weighted) signal-to-noise ratio at 1.8 V
ADC
90 dB (A-weighted) signal-to-noise ratio at 3.3 V
85dB (A-weighted) signal-to-noise ratio at 1.8 V
Audio sample rates
8 kHz, 44.1 kHz or 88.2 kHz–XTI/MCLK frequency 11.2896
MHz (256 × F_S) or 16.9344 MHz (384 × F_S)
8 kHz, 32 kHz, 48 kHz or 96 kHz–XTI/MCLK frequency
12.288 MHz (256 × F_S) or 18.432 MHz (384 × F_S)
Highly efficient headphone amplifier
Complete stereo/mono or microphone/line interface
Normal and USB modes programmed under software control
Low power
8 mW stereo playback (1.8 V all power supplies)
20 mW record and playback (1.8 V all power supplies))
Low supply voltages
1.8 V to 3.6 V analog supply range
1.8 V to 3.6 V digital supply range
VOLTAGE REGULATOR
B
JTAG TEST AND EMULATION
PERIPHERAL ACCESS
BUS
INTERRUPT
CONTROLLER
USB
L1
INSTRUCTION
MEMORY
L1
DATA
MEMORY
DMA
CONTROLLER
16
DMA CORE BUS
EXTERNAL ACCESS BUS
EXTERNAL PORT
FLASH, SDRAM CONTROL
DMA
EXTERNAL
BUS
BOOT
ROM
OTP
WATCHDOG TIMER
RTC
TWI
SPORT1-0
NAND
PPI
UART 0-1
SPI
TIMERS 0-7
EMAC/HDMA
PORTS
CODEC
Figure 1. Functional Block Diagram
Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc.
Rev. PrB
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