ADSP-2191M Datasheet, PDF (1/52 Pages) Analog Devices – DSP Microcomputer

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DSP Microcomputer
ADSP-2191M
PERFORMANCE FEATURES
6.25 ns Instruction Cycle Time, for up to 160 MIPS
Sustained Performance
ADSP-218x Family Code Compatible with the Same
Easy to Use Algebraic Syntax
Single-Cycle Instruction Execution
Single-Cycle Context Switch between Two Sets of Com-
putation and Memory Instructions
Instruction Cache Allows Dual Operand Fetches in Every
Instruction Cycle
Multifunction Instructions
Pipelined Architecture Supports Efficient Code
Execution
Architectural Enhancements for Compiled C and C++
Code Efficiency
Architectural Enhancements beyond ADSP-218x Family
are Supported with Instruction Set Extensions for
Added Registers, and Peripherals
Flexible Power Management with User-Selectable
Power-Down and Idle Modes
FUNCTIONAL BLOCK DIAGRAM
INTERNAL MEMORY
FOUR INDEPENDENT BLOCKS
ADSP-219x
DSP CORE
CACHE
64 ؋ 24-BIT
ADDRESS
24 BIT
DATA
ADDRESS 24 BIT
DATA
ADDRESS 16 BIT
DATA
ADDRESS
16 BIT
DATA
JTAG
6
TEST &
EMULATION
DAG1
4 ؋ 4 ؋ 16
DAG2
4 ؋ 4 ؋ 16
PROGRAM
SEQUENCER
PM ADDRESS BUS
24
DM ADDRESS BUS
24
DMA
CONNECT
PM DATA BUS
24
PX
DM DATA BUS
16
DATA
REGISTER
FILE
INPUT
REGISTERS
MULT
RESULT
REGISTERS
16 ؋ 16-BIT
BARREL
SHIFTER
ALU
EXTERNAL PORT
I/O ADDRESS 18
24 DMA ADDRESS
24 DMA DATA
22
ADDR BUS
MUX
DATA BUS
16
MUX
16 _{I/O DATA}
I/O PROCESSOR
24
I/O REGISTERS
(MEMORY-MAPPED)
CONTROL
STATUS
BUFFERS
DMA
CONTROLLER
HOST PORT
18
SERIAL PORTS
(3)
6
SPI PORTS
(2)
2
UART PORT
(1)
3
SYSTEM INTERRUPT CONTROLLER
PROGRAMMABLE
FLAGS (16)
TIMERS (3)
REV. 0
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