ADSP-21262 Datasheet, PDF (1/44 Pages) Analog Devices – SHARC Processor

SUMMARY
High performance 32-bit/40-bit floating-point processor
optimized for high precision signal processing
applications
The ADSP-21262 SHARC DSP is code compatible with all
other SHARC DSPs
Single-Instruction Multiple-Data (SIMD) computational archi-
tecture—two 32-bit IEEE floating-point/32-bit fixed-
point/40-bit extended precision floating-point computa-
tional units, each with a multiplier, ALU, shifter, and
register file
High bandwidth I/O—A parallel port, SPI port, six serial
ports, digital audio interface (DAI), and JTAG
SHARC^® Processor
ADSP-21262
DAI incorporates two precision clock generators (PCGs), an
input data port (IDP) which includes the parallel data
acquisition port (PDAP), and three programmable timers,
all under software control through the signal routing unit
(SRU)
On-chip memory—2M bits of on-chip SRAM and a dedicated
4M bits of on-chip mask-programmable ROM
Six independent synchronous serial ports provide a variety
of serial communication protocols including TDM and I²S
modes
The ADSP-21262 is available with a 200 MHz core instruction
rate. For complete ordering information, see Ordering
Guide on Page 44.
CORE PROCESSO R
TIME R
INSTRUCTION
CACHE
32 ؋ 48-BIT
DAG1
DAG2
8 ؋ 4 ؋ 32 8 ؋ 4 ؋ 32
PRO GRAM
S EQUENCE R
DUAL PORTED MEMORY
BLOCK 0
S RAM
1 MBIT
ROM
2 MBIT
ADDR
DATA
DUAL PORTED MEMORY
BLO CK 1
S RAM
1 MBIT
ROM
2 MBIT
ADDR
DATA
32
PM ADDRESS BUS
32
DM ADDRESS BUS
PROCES SING
EL EMENT
( PEX )
PROCESS ING
ELE ME NT
(P EY)
PX REGISTER
64 PM DATA BUS
64 DM DATA BUS
DMA CO NTROLLER
22 C H A NN E LS
4
SPI PO RT (1)
6
JTAG TEST & EMULATION
S
SERIAL PORTS (6)
20
SI GNAL
RO UTI NG
UNI T
I NP UT
DATA PORTS (8)
PARALLEL DATA
ACQUISITION PORT
PRECISI ON CLO CK
GENERATORS (2)
3
TIMERS (3)
DIGITAL AUDIO INTERFACE
I/O PROCESSOR
I OD
IOA
( 32 )
( 18 )
4
GPIO FLAGS/
IRQ/TIM EX P
IOP
RE GISTE RS
(MEMORY MAPPED)
CO NTROL,
S TATUS ,
DATA BUFFERS
16
A D D RES S/
D A TA BUS / GPIO
3
C ON TR OL/GP IO
P ARALLEL
P ORT
Figure 1. Functional Block Diagram
SHARC and the SHARC logo are registered trademarks of Analog Devices, Inc.
Rev. A
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