ADG721_15 Datasheet, PDF (1/16 Pages) Analog Devices – CMOS, Low Voltage

Data Sheet
CMOS, Low Voltage, 4 Ω Dual SPST
Switches in 3 mm × 2 mm LFCSP
ADG721/ADG722/ADG723
FEATURES
1.8 V to 5.5 V single supply
4 Ω (max) on resistance
Low on resistance flatness
−3 dB bandwidth >200 MHz
Tiny package options
8-lead MSOP
3 mm × 2 mm LFCSP (A grade)
Fast switching times
tON, 20 ns
tOFF, 10 ns
Low power consumption (<0.1 μW)
TTL/CMOS compatible
APPLICATIONS
USB 1.1 signal switching circuits
Cell phones
PDAs
Battery-powered systems
Communication systems
Sample hold systems
Audio signal routing
Video switching
Mechanical reed relay replacement
FUNCTIONAL BLOCK DIAGRAMS
ADG721
ADG722
S1
S1
IN1
IN1
D1
D1
D2
D2
IN2
IN2
S2
S2
Figure 1.
ADG723
S1
D1
IN2
Figure 2.
IN1
D2
S2
SWITCHES SHOWN FOR
A LOGIC "0" INPUT
Figure 3.
GENERAL DESCRIPTION
The ADG721, ADG722, and ADG723 are monolithic CMOS
SPST switches. These switches are designed on an advanced
submicron process that provides low power dissipation yet gives
high switching speed, low on resistance, and low leakage
currents. The devices are packaged in both a tiny 3 mm × 2 mm
LFCSP and an MSOP, making them ideal for space-constrained
applications.
The ADG721, ADG722, and ADG723 are designed to operate
from a single 1.8 V to 5.5 V supply, making them ideal for use
in battery-powered instruments and with the new generation of
DACs and ADCs from Analog Devices, Inc.
The ADG721, ADG722, and ADG723 contain two independent
single-pole/single-throw (SPST) switches. The ADG721 and
ADG722 differ only in that both switches are normally open
and normally closed, respectively. In the ADG723, Switch 1 is
normally open and Switch 2 is normally closed.
Each switch of the ADG721, ADG722, and ADG723 conducts
equally well in both directions when on. The ADG723 exhibits
break-before-make switching action.
PRODUCT HIGHLIGHTS
1. 1.8 V to 5.5 V single-supply operation.
2. Very low RON (4 Ω max at 5 V, 10 Ω max at 3 V).
3. Low on resistance flatness.
4. −3 dB bandwidth >200 MHz.
5. Low power dissipation. CMOS construction ensures low
power dissipation.
6. 8-lead MSOP and 3 mm × 2 mm LFCSP.
Rev. E
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