ADG5462F Datasheet, PDF (1/29 Pages) Analog Devices – User Defined Fault Protection and Detection,10 Ω RON, Quad Channel Protector

Data Sheet
User Defined Fault Protection and
Detection,10 Ω R_ON, Quad Channel Protector
ADG5462F
FEATURES
User defined secondary supplies set overvoltage level
Overvoltage protection up to −55 V and +55 V
Power-off protection up to −55 V and +55 V
Overvoltage detection on source pins
Minimum secondary supply level: 4.5 V single-supply
Interrupt flag indicates fault status
Low on resistance: 10 Ω typical
On-resistance flatness: 0.5 Ω maximum
4 kV human body model (HBM) ESD rating
Latch-up immune under any circumstance
VSS to VDD analog signal range
±5 V to ±22 V dual supply operation
8 V to 44 V single-supply operation
Fully specified at ±15 V, ±20 V, +12 V, and +36 V
APPLICATIONS
Analog input/output modules
Process control/distributed control systems
Data acquisition
Instrumentation
Avionics
Automatic test equipment
Communication systems
GENERAL DESCRIPTION
The ADG5462F contains four channels that are overvoltage
protected. The channel protector is placed in series with the signal
path and protects sensitive components from overvoltage faults
in that path. The channel protector prevents overvoltages when
powered and unpowered, and it is ideal for use in applications
where correct power supply sequencing cannot always be guaranteed.
The primary supply voltages define the on-resistance profile,
while the secondary supply voltages define the voltage level at
which the overvoltage protection engages.
When no power supplies are present, the channel remains in the off
condition, and the channel inputs are high impedance. Under
normal operating conditions, if the analog input signal levels on
any Sx pin exceed positive fault voltage (POSFV) or negative fault
voltage (NEGFV) by a threshold voltage (VT), the channel turns
off and that Sx pin becomes high impedance. If the DR pin is
driven low, the drain pin (Dx) is pulled to the secondary supply
voltage that was exceeded. The output profile for each DR voltage
level is shown in Figure 49. Input signal levels up to −55 V or
+55 V relative to ground are blocked in both the powered and
unpowered conditions.
FUNCTIONAL BLOCK DIAGRAM
V_DD V_SS
S1
D1
S2
D2
S3
D3
S4
V_IN
D4
V_OUT
ADG5462F ^FF
POSFV NEGFV DR
Figure 1.
The low on-resistance of these switches, combined with the
on-resistance flatness over a significant portion of the signal
range make them an ideal solution for data acquisition and
instrumentation applications where excellent linearity and low
distortion are critical.
PRODUCT HIGHLIGHTS
1. Source pins (Sx) are protected against voltages greater than
the secondary supply rails (POSFV and NEGFV), up to
−55 V and +55 V.
2. In an unpowered state, source pins (Sx) are protected
against voltages from −55 V to +55 V.
3. Overvoltage detection with digital output indicates the
operating state of the channels.
4. Trench isolation guards against latch-up.
5. Optimized for low on-resistance and on-resistance flatness.
6. The ADG5462F operates from a dual power supply range of
±5 V to ±22 V or a single power supply range of 8 V to 44 V.
Rev. B
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