ADG5248F Datasheet, PDF (1/33 Pages) Analog Devices – User Defined Fault Protection and Detection, 0.8 pC QINJ, 8-1/Dual 4-1 Multiplexers

Data Sheet
User Defined Fault Protection and
Detection, 0.8 pC Q_INJ, 8:1/Dual 4:1 Multiplexers
ADG5248F/ADG5249F
FEATURES
User defined secondary supplies set overvoltage level
Overvoltage protection up to −55 V and +55 V
Power-off protection up to −55 V and +55 V
Overvoltage detection on source pins
Minimum secondary supply level: 4.5 V single-supply
Interrupt flags indicate fault status
Low charge injection (QINJ): 0.8 pC
Low drain/source on capacitance
ADG5248F: 19 pF
ADG5249F: 14 pF
Latch-up immune under any circumstance
Known state without digital inputs present
VSS to VDD analog signal range
±5 V to ±22 V dual supply operation
8 V to 44 V single-supply operation
Fully specified at ±15 V, ±20 V, +12 V, and +36 V
APPLICATIONS
Analog input/output modules
Process control/distributed control systems
Data acquisition
Instrumentation
Avionics
Automatic test equipment
Communication systems
Relay replacement
GENERAL DESCRIPTION
The ADG5248F and ADG5249F are 8:1 and dual 4:1 analog
multiplexers. The ADG5248F switches one of eight inputs to a
common output, and the ADG5249F switches one of four differen-
tial inputs to a common differential output. Each channel conducts
equally well in both directions when on, and each channel has an
input signal range that extends to the supplies. The primary supply
voltages define the on-resistance profile, whereas the secondary
supply voltages define the voltage level at which the overvoltage
protection engages.
When no power supplies are present, the channel remains in the off
condition, and the switch inputs are high impedance. Under normal
operating conditions, if the analog input signal levels on any Sx pin
exceed positive fault voltage (POSFV) or negative fault voltage
(NEGFV) by a threshold voltage (VT), the channel turns off and
that Sx pin becomes high impedance. If the switch on, the drain pin
is pulled to the secondary supply voltage that was exceeded. Input
signal levels up to +55 V or −55 V relative to ground are blocked, in
both the powered and unpowered conditions.
Rev. 0
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FUNCTIONAL BLOCK DIAGRAMS
ADG5248F
S1
D
S8
FAULT DETECTION
FF
AND
SWITCH DRIVER
SF
A0 A1 A2 EN POSFV NEGFV
Figure 1. ADG5248F Functional Block Diagram
ADG5249F
S1A
DA
S4A
S1B
DB
S4B
FAULT DETECTION
FF
AND
SWITCH DRIVER
SF
A0 A1 EN POSFV NEGFV
Figure 2. ADG5249F Functional Block Diagram
The low capacitance and charge injection of these switches make
them ideal solutions for data acquisition and sample-and-hold
applications, where low glitch switching and fast settling times
are required.
Note that, throughout this data sheet, multifunction pins, such as
A0/F0, are referred to either by the entire pin name or by a single
function of the pin, for example, A0, when only that function is
relevant.
PRODUCT HIGHLIGHTS
1. Source pins are protected against voltages greater than the
secondary supply rails, up to −55 V and +55 V.
2. Source pins are protected against voltages between −55 V
and +55 V in an unpowered state.
3. Overvoltage detection with digital output indicates
operating state of switches.
4. Trench isolation guards against latch-up.
5. Optimized for low charge injection and on capacitance.
6. The ADG5248F/ADG5249F can be operated from a dual
supply of ±5 V to ±22 V or a single power supply of 8 V to 44 V.
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