ADG1636 Datasheet, PDF (1/16 Pages) Analog Devices – 1 Ω Typical On Resistance, ±5 V, +12 V, +5 V, and +3.3 V Dual SPDT Switches

1 Ω Typical On Resistance, ±5 V, +12 V,
+5 V, and +3.3 V Dual SPDT Switches
ADG1636
FEATURES
1 Ω typical on resistance
0.2 Ω on resistance flatness
±3.3 V to ±8 V dual supply operation
3.3 V to 16 V single supply operation
No VL supply required
3 V logic-compatible inputs
Rail-to-rail operation
Continuous current per channel
LFCSP package: 385 mA
TSSOP package: 238 mA
16-lead TSSOP and 16-lead, 4 mm × 4 mm LFCSP
APPLICATIONS
Communication systems
Medical systems
Audio signal routing
Video signal routing
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Relay replacements
GENERAL DESCRIPTION
The ADG1636 is a monolithic CMOS device containing two
independently selectable single-pole/double-throw (SPDT)
switches. An EN input is used to enable or disable the device.
When disabled, all channels are switched off. Each switch
conducts equally well in both directions when on and has
an input signal range that extends to the supplies. In the off
condition, signal levels up to the supplies are blocked. Both
switches exhibit break-before-make switching action for use
in multiplexer applications.
The ultralow on resistance of these switches make them ideal
solutions for data acquisition and gain switching applications where
low on resistance and distortion is critical. The on resistance profile
is very flat over the full analog input range, ensuring excellent
linearity and low distortion when switching audio signals.
The CMOS construction ensures ultralow power dissipation,
making the parts ideally suited for portable and battery-
powered instruments.
Rev. A
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FUNCTIONAL BLOCK DIAGRAMS
ADG1636
S1A
D1
S1B
IN1
IN2
S2A
D2
S2B
NOTES
1. SWITCHES SHOWN FOR A LOGIC 1 INPUT.
Figure 1. 16-Lead TSSOP
ADG1636
S1A
S2A
D1
D2
S1B
S2B
LOGIC
IN1 IN2 EN
NOTES
1. SWITCHES SHOWN FOR A 1 INPUT LOGIC.
Figure 2. 16-Lead LFCSP
PRODUCT HIGHLIGHTS
1. 1.6 Ω maximum on resistance over temperature.
2. Minimum distortion: THD + N = 0.007%.
3. 3 V logic-compatible digital inputs: VINH = 2.0 V, VINL = 0.8 V.
4. No VL logic power supply required.
5. Ultralow power dissipation: <16 nW.
6. 16-lead TSSOP and 16-lead 4 mm × 4 mm LFCSP.
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