ADF4355-2 Datasheet, PDF (1/38 Pages) Analog Devices – Programmable output power level

Data Sheet
Microwave Wideband Synthesizer
with Integrated VCO
ADF4355-2
FEATURES
GENERAL DESCRIPTION
RF output frequency range: 54 MHz to 4400 MHz
The ADF4355-2 allows implementation of fractional-N or
Fractional-N synthesizer and integer-N synthesizer
integer-N phase-locked loop (PLL) frequency synthesizers
High resolution 38-bit modulus
when used with an external loop filter and an external reference
Low phase noise, VCO
frequency. A series of frequency dividers permits operation
Programmable divide by 1, 2, 4, 8, 16, 32, or 64 output
from 54 MHz to 4400 MHz.
Analog and digital power supplies: 3.3 V
Charge pump and VCO power supplies: 5 V typical
Logic compatibility: 1.8 V
Programmable dual modulus prescaler of 4/5 or 8/9
Programmable output power level
RF output mute function
3-wire serial interface
Analog and digital lock detect
The ADF4355-2 has an integrated voltage controlled oscillator
(VCO) with a fundamental output frequency ranging from
3400 MHz to 6800 MHz. In addition, the VCO frequency is
connected to divide by 1, 2, 4, 8, 16, 32, or 64 circuits that allow
the user to generate radio frequency (RF) output frequencies as
low as 54 MHz. For applications that require isolation, the RF
output stage can be muted. The mute function is both pin and
software controllable.
APPLICATIONS
Control of all on-chip registers is through a simple 3-wire interface.
Wireless infrastructure (W-CDMA, TD-SCDMA,
The ADF4355-2 operates with analog and digital power supplies,
WiMAX, GSM, PCS, DCS, DECT)
ranging from 3.15 V to 3.45 V, with charge pump and VCO
Point to point/point to multipoint microwave links
supplies from 4.75 V to 5.25 V. The ADF4355-2 also contains
Satellites/VSATs
hardware and software power-down modes.
Test equipment/instrumentation
Clock generation
FUNCTIONAL BLOCK DIAGRAM
CE
AV_DD
DV_DD
V_P
R_SET
V_VCO
V_RF
AV_DD
REF_INA
REF_IN B
CLK
DATA
LE
×2
DOUBLER
10-BIT R
COUNTER
÷2
DIVIDER
DATA REGISTER
FUNCTION
LATCH
INTEGER
REG
FRACTION MODULUS
REG
REG
THIRD-ORDER
FRACTIONAL
INTERPOLATOR
LOCK
DETECT
MULTIPLEXER
CHARGE
PUMP
PHASE
COMPARATOR
VCO
CORE
÷11/62/3/42//864
N COUNTER
A_GND
CP_GND
A_GNDRF
Figure 1.
MULTIPLEXER
SD_GND A_GNDVCO
OUTPUT
STAGE
OUTPUT
STAGE
MUXOUT
C_REG1
C_REG2
CP_OUT
V_TUNE
V_REF
V_BIAS
V_REGVCO
RF_OUTA+
RF_OUTA–
PDB_RF
RF_OUTB+
RF_OUTB–
ADF4355-2
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] ©2014–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com