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ADF4212L_15 Datasheet, PDF (1/28 Pages) Analog Devices – Dual Low Power PLL Frequency Synthesizer
Data Sheet
Dual Low Power PLL
Frequency Synthesizer
ADF4212L
FEATURES
GENERAL DESCRIPTION
IDD total: 7.5 mA
The ADF4212L is a dual frequency synthesizer that can be used
Bandwidth RF/IF: 2.4 GHz/1.0 GHz
to implement local oscillators (LO) in the up-conversion and
2.7 V to 3.3 V power supply
down-conversion sections of wireless receivers and transmitters.
Separate VP allows extended tuning voltage
It can provide the LO for both the RF and IF sections. It consists
Programmable dual modulus prescaler
of a low noise digital phase frequency detector (PFD), a precision
RF and IF: 8/9, 16/17, 32/33, 64/65
charge pump, a programmable reference divider, programmable
Programmable charge pump currents
3-wire serial interface
Analog and digital lock detect
Fastlock mode
Power-down mode
20-lead TSSOP and 20-lead LFCSP packages
A and B counters, and a dual modulus prescaler (P/P + 1). The
A (6-bit) and B (12-bit) counters, in conjunction with the dual
modulus prescaler (P/P + 1), implement an N divider (N = BP +
A). In addition, the 15-bit reference counter (R counter) allows
selectable REFIN frequencies at the PFD input. A complete phase-
locked loop (PLL) can be implemented if the synthesizer is used
APPLICATIONS
with external loop filters and voltage controlled oscillators (VCOs).
Wireless handsets (GSM, PCS, DCS, DSC1800, CDMA,
WCDMA)
Base stations for wireless Radio (GSM, PCS, DCS,
CDMA, WCDMA)
Control of all the on-chip registers is via a simple 3-wire
interface with 1.8 V compatibility. The devices operate with a
power supply ranging from 2.7 V to 3.3 V and can be powered
down when not in use.
Wireless LANS
Cable TV tuners (CATV)
Communications test equipment
FUNCTIONAL BLOCK DIAGRAM
VDD1
VDD2
VP1
VP2
RSET
ADF4212L
IFIN
IF
PRESCALER
REFIN
CLK
DATA
LE
OSCILLATOR
22-BIT
DATA
REGISTER
SDOUT
12-BIT IF
B-COUNTER
6-BIT IF
A-COUNTER
15-BIT IF
R-COUNTER
15-BIT RF
R-COUNTER
IF PHASE
FREQUENCY
DETECTOR
REFERENCE
CHARGE
PUMP
CPIF
IF
LOCK
DETECT
IF CURRENT
SETTING
IFCP3 IFCP2 IFCP1
OUTPUT
MUX
MUXOUT
RF
LOCK
DETECT
RFCP3 RFCP2 RFCP1
REFERENCE
RFIN
RF
PRESCALER
12-BIT RF
B-COUNTER
6-BIT RF
A-COUNTER
RF PHASE
FREQUENCY
DETECTOR
DGNDRF AGNDRF
DGNDIF
AGNDIF
Figure 1.
CHARGE
PUMP
REFERENCE
RSET
FLO SWITCH
CPRF
FLO
Rev. E
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