ADF4212L Datasheet, PDF (1/20 Pages) Analog Devices – Dual Low Power PLL Frequency Synthesizer

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Dual Low Power PLL
Frequency Synthesizer
ADF4212L
FEATURES
I_DD Total, 7.5 mA
Bandwidth RF/IF, 2.4 GHz/1.0 GHz
2.7 V to 3.3 V Power Supply
Separate V_P Allows Extended Tuning Voltage
Programmable Dual Modulus Prescaler
RF and IF: 8/9, 16/17, 32/33, 64/65
Programmable Charge Pump Currents
3-Wire Serial Interface
Analog and Digital Lock Detect
Fastlock Mode
Power-Down Mode
20-Lead TSSOP and 20-Lead MLF Chip Scale Package
APPLICATIONS
Wireless Handsets (GSM, PCS, DCS, CDMA, WCDMA)
Base Stations for Wireless Radio (GSM, PCS, DCS,
CDMA, WCDMA)
Wireless LANS
Cable TV Tuners (CATV)
Communications Test Equipment
GENERAL DESCRIPTION
The ADF4212L is a dual frequency synthesizer that can be used
to implement local oscillators (LO) in the up-conversion and
down-conversion sections of wireless receivers and transmitters.
It can provide the LO for both the RF and IF sections. It con-
sists of a low noise digital PFD (Phase Frequency Detector), a
precision charge pump, a programmable reference divider, pro-
grammable A and B counters, and a dual modulus prescaler
(P/P + 1). The A (6-bit) and B (12-bit) counters, in conjunction
with the dual modulus prescaler (P/P + 1), implement an N
divider (N = BP + A). In addition, the 14-bit reference counter
(R Counter), allows selectable REFIN frequencies at the PFD
input. A complete PLL (Phase-Locked Loop) can be imple-
mented if the synthesizer is used with external loop filters and
VCOs (Voltage Controlled Oscillators).
Control of all the on-chip registers is via a simple 3-wire interface
with 1.8 V compatibility. The devices operate with a power
supply ranging from 2.6 V to 3.3 V and can be powered down
when not in use.
FUNCTIONAL BLOCK DIAGRAM
ADF4212L
IF_IN
IF
PRESCALER
REF_IN
CLOCK
DATA
LE
OSCILLATOR
22-BIT
DATA SDOUT
REGISTER
V_DD1
V_DD2
V_P1
V_P2
R_SET
12-BIT IF
B-COUNTER
6-BIT IF
A-COUNTER
14-BIT IF
R-COUNTER
IF PHASE
FREQUENCY
DETECTOR
REFERENCE
CHARGE
PUMP
IF
LOCK
DETECT
IF CURRENT
SETTING
IFCP3 IFCP2 IFCP1
OUTPUT
MUX
CP_IF
MUXOUT
14-BIT RF
R-COUNTER
RFCP3 RFCP2 RFCP1
RF
LOCK
DETECT
REFERENCE
RF_IN
RF
PRESCALER
12-BIT RF
B-COUNTER
6-BIT RF
A-COUNTER
RF PHASE
FREQUENCY
DETECTOR
DGND_RF AGND_RF DGND_IF AGND_IF
CHARGE
PUMP
REFERENCE
R_SET
FL_O SWITCH
CP_RF
FL_O
REV. 0
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use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
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© Analog Devices, Inc., 2002