ADF4207_15 Datasheet, PDF (1/20 Pages) Analog Devices – Dual RF PLL Frequency Synthesizers

a
Dual RF PLL Frequency Synthesizers
ADF4206/ADF4207/ADF4208
FEATURES
GENERAL DESCRIPTION
ADF4206: 550 MHz/550 MHz
The ADF4206 family of dual frequency synthesizers can be
ADF4207: 1.1 GHz/1.1 GHz
used to implement local oscillators in the upconversion and
ADF4208: 2.0 GHz/1.1 GHz
downconversion sections of wireless receivers and transmitters.
2.7 V to 5.5 V Power Supply
Each synthesizer consists of a low-noise digital PFD (Phase
Selectable Charge Pump Supply (VP) Allows Extended Frequency Detector), a precision charge pump, a programmable
Tuning Voltage in 3 V Systems
reference divider, programmable A and B counters and a dual-
OBSOLETE ^{Selectable Charge Pump Currents}
modulus prescaler (P/P + 1). The A (6-bit) and B (11-bit)
On-Chip Oscillator Circuit
counters, in conjunction with the dual modulus prescaler (P/P + 1),
Selectable Dual Modulus Prescaler
implement an N divider (N = BP + A). In addition, the 14-bit
RF2: 32/33 or 64/65
reference counter (R Counter), allows selectable REFIN frequen-
RF1: 32/33 or 64/65
cies at the PFD input. The on-chip oscillator circuitry allows
3-Wire Serial Interface
the reference input to be derived from crystal oscillators.
Power-Down Mode
A complete PLL (Phase-Locked Loop) can be implemented if
APPLICATIONS
Wireless Handsets (GSM, PCS, DCS, CDMA, WCDMA)
the synthesizers are used with an external loop filter and VCOs
(Voltage Controlled Oscillators).
Base Stations for Wireless Radio (GSM, PCS, DCS,
Control of all the on-chip registers is via a simple 3-wire interface.
CDMA, WCDMA)
The devices operate with a power supply ranging from 2.7 V
Wireless LANS
to 5.5 V and can be powered down when not in use.
Communications Test Equipment
CATV Equipment
FUNCTIONAL BLOCK DIAGRAM
V_DD1
V_DD2
V_P1
V_P2
RF2_INA
RF2_INB
N = BP + A
RF2
PRESCALER
OSC_IN
OSC_OUT
CLOCK
DATA
LE
OSCILLATOR
22-BIT
DATA
REGISTER
SDOUT
11-BIT RF2
B-COUNTER
6-BIT RF2
A-COUNTER
14-BIT RF2
R-COUNTER
ADF4206/ADF4207/ADF4208
PHASE
COMPARATOR
RF2
LOCK
DETECT
CHARGE
PUMP
OUTPUT
MUX
CP_RF2
MUXOUT
14-BIT RF1
R-COUNTER
RF1
LOCK
DETECT
RF1_INA
RF1_INB
N = BP + A
RF1
PRESCALER
11-BIT RF1
B-COUNTER
6-BIT RF1
A-COUNTER
PHASE
COMPARATOR
CHARGE
PUMP
CP_RF1
REV. 0
DGND_RF1 AGND_RF1
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
DGND_RF2 AGND_RF2
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone]
© Analog Devices, Inc., 2001