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ADF4150BCPZ Datasheet, PDF (1/28 Pages) Analog Devices – Fractional-N/Integer-N PLL Synthesizer
Fractional-N/Integer-N PLL Synthesizer
ADF4150
FEATURES
GENERAL DESCRIPTION
Fractional-N synthesizer and integer-N synthesizer
Programmable divide-by-1/-2/-4/-8/-16 output
5.0 GHz RF bandwidth
3.0 V to 3.6 V power supply
1.8 V logic compatibility
Separate charge pump supply (VP) allows extended tuning
voltage in 3 V systems
Programmable dual-modulus prescaler of 4/5 or 8/9
Programmable output power level
RF output mute function
3-wire serial interface
Analog and digital lock detect
Switched bandwidth fast-lock mode
Cycle slip reduction
APPLICATIONS
The ADF4150 allows implementation of fractional-N or
integer-N phase-locked loop (PLL) frequency synthesizers
if used with an external voltage-controlled oscillator (VCO),
loop filter, and external reference frequency.
The ADF4150 is for use with external VCO parts and is
software compatible with the ADF4350. The VCO frequency
can be divided by 1/2/4/8/16 to allow the user to generate RF
output frequencies as low as 31.25 MHz. For applications that
require isolation the RF output stage can be muted. The mute
function is both pin and software controllable.
Control of all the on-chip registers is through a simple 3-wire
interface. The device operates with a power supply ranging
from 3.0 V to 3.6 V and can be powered down when not in use.
The ADF4150 is available in a 4 mm × 4 mm package.
Wireless infrastructure (W-CDMA, TD-SCDMA, WiMax, GSM,
PCS, DCS, DECT)
Test equipment
Wireless LANs, CATV equipment
Clock generation
FUNCTIONAL BLOCK DIAGRAM
SDVDD
AVDD
DVDD
VP
RSET
REFIN
CLK
DATA
LE
×2
DOUBLER
10-BIT R
COUNTER
÷2
DIVIDER
DATA REGISTER
FUNCTION
LATCH
INTEGER FRACTION MODULUS
REG
REG
REG
THIRD-ORDER
FRACTIONAL
INTERPOLATOR
N COUNTER
LOCK
DETECT
MULTIPLEXER
CHARGE
PUMP
PHASE
COMPARATOR
FLO SWITCH
MUXOUT
SW
LD
CPOUT
DIVIDE-BY-1/
-2/-4/-8/-16
MULTIPLEXER
OUTPUT
STAGE
RF
INPUT
RFOUT+
RFOUT–
PDBRF
RFIN+
RFIN–
ADF4150
CE
AGND
Figure 1.
CPGND
SDGND
Rev. 0
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