ADF4110 Datasheet, PDF (1/24 Pages) Analog Devices – RF PLL Frequency Synthesizers

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RF PLL Frequency Synthesizers
ADF4110/ADF4111/ADF4112/ADF4113
FEATURES
GENERAL DESCRIPTION
ADF4110: 550 MHz
The ADF4110 family of frequency synthesizers can be used
ADF4111: 1.2 GHz
to implement local oscillators in the upconversion and down-
ADF4112: 3.0 GHz
conversion sections of wireless receivers and transmitters. They
ADF4113: 4.0 GHz
consist of a low-noise digital PFD (Phase Frequency Detector),
2.7 V to 5.5 V Power Supply
a precision charge pump, a programmable reference divider,
Separate Charge Pump Supply (V_P) Allows Extended
Tuning Voltage in 3 V Systems
programmable A and B counters and a dual-modulus prescaler
(P/P+1). The A (6-bit) and B (13-bit) counters, in conjunction
Programmable Dual Modulus Prescaler 8/9, 16/17,
with the dual modulus prescaler (P/P+1), implement an N
32/33, 64/65
divider (N = BP + A). In addition, the 14-bit reference counter
Programmable Charge Pump Currents
(R Counter), allows selectable REFIN frequencies at the PFD
Programmable Antibacklash Pulsewidth
input. A complete PLL (Phase-Locked Loop) can be imple-
3-Wire Serial Interface
mented if the synthesizer is used with an external loop filter and
Analog and Digital Lock Detect
VCO (Voltage Controlled Oscillator).
Hardware and Software Power-Down Mode
Control of all the on-chip registers is via a simple 3-wire interface.
APPLICATIONS
Base Stations for Wireless Radio (GSM, PCS, DCS,
The devices operate with a power supply ranging from 2.7 V to
5.5 V and can be powered down when not in use.
CDMA, WCDMA)
Wireless Handsets (GSM, PCS, DCS, CDMA, WCDMA)
Wireless LANS
Communications Test Equipment
CATV Equipment
FUNCTIONAL BLOCK DIAGRAM
AV_DD
DV_DD
V_P
CPGND
REFERENCE
R_SET
REF_IN
CLK
DATA
LE
24-BIT
INPUT REGISTER ₂₂
SD_OUT
14-BIT
R COUNTER
14
R COUNTER
LATCH
FUNCTION
LATCH
A, B COUNTER
LATCH
19
PHASE
FREQUENCY
CHARGE
DETECTOR
PUMP
CP
LOCK
DETECT
CURRENT
SETTING 1
CURRENT
SETTING 2
CPI3 CPI2 CPI1 CPI6 CPI5 CPI4
RF_INA
RF_INB
FROM
FUNCTION
LATCH
13
N = BP + A
PRESCALER
P/P +1
13-BIT
B COUNTER
LOAD
LOAD
6-BIT
A COUNTER
6
AV_DD
SD_OUT
MUX
HIGH Z
MUXOUT
ADF4110/ADF4111
ADF4112/ADF4113
M3 M2 M1
REV. 0
CE
AGND
DGND
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