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ADC1109_15 Datasheet, PDF (1/4 Pages) Analog Devices – HIGH SPEED ANALOG TO DIGITAL CONVERTER
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tWOEVICES
FEATURES
High Speed: 10 Bits in 4/-1sMax
, Error Relative to Full Scale: :t%lSB
User' Choice of Unipolar or Bipolar Input
Small 2" x 3" x 0.4" Module
High Speed
Analogto Digital Converter
ADC1109
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OB GENERAL DESCRIPTION
S The ADCll09 is a high speed analog-to-digital converter
packaged in a compact 2" x 3" x 0.4" module. It uses the
O successive approximations technique to perform complete 10
bit conversion in less than 4/-15with :t'hLSB relative accuracy.
It LE The ADCll 09 can be configured by the user to accept either
unipolar or bipolar input signals and to produce Binary, Off-
TE set Binary, or Two's Complement coded outputs. The data
The SERIAL DATA output is of the non-return-to-zero (NRZ)
type. The data is available, MSB first, 40ns after each of the
ten "0" to "1" clock transitions.
J CONVERT
COMMAND
-
CLOCK
outputs are fully DTL/TTL. compatible and are available in both
J STATUS
L-
parallel and serial form.
TIMING
As shown in Figure I, the "0" to "1" transition of the CON-
VERT COMMAND input sets the MSB output to logic "0" and
the STATUS, MSB, and BIT 2 through BIT 10 outputs to logic
"I". Nothing further happens until the CONVERT COMMAND
returns to logic "0", at which time the conversion proceeds.
With the MSB in the logic "0" state, the internal digital-to-
analog converter's output is compared with the analog input.
If the D/ A output is less than the analog input, the first "0"
to "1" clock transition resets the MSB to logic" 1". If the D/ A
output is greater than the analog input, the MSB remains at
logic "0".
The first "0" to "1" clock transition also sets the BIT 2 output
to logic "0" and another comparison is made. This process con-
tinues through each successive bit until the BIT 10 (LSB) com-
parison is completed. At this time the STATUS output retUrns
to logic "0" and the conversion cycle ends.
l MSB
-
BIT 2
BIT 3
BIT 9
LSB
J NisEi
SERIAL
OUTPUT
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PREVIOUSWORD: 111 ",11
NEWWORD:
101, , 01
Figure 1. Timing Diagram
8
Information furnished by Analog Devices is believed to be accurate
and reliable, However, no responsibility is assumed by Analog Devices
for its use; nor for any infringements of patents or other rights of third
parties which may result from its use, No license is granted by implica-
tion or otherwise under any patent or patent rights of Analog Devices.
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