ADC1105_15 Datasheet, PDF (1/6 Pages) Analog Devices – High Resolution, Dual Slope A/D Converter

-. ANALOG
WDEVICES
High Resolution,
DualSlopeAID Converter
PRELIMINARY TECHNICAL DATA
FEATURES
Output Versatility With External Counters and Registers
High Resolution
Up to 1:20,000 (ADC1105K)
Up to 1:2,000 (ADC1105J)
Excellent Zero Stability
User Choice of Input Ranges
OBSOLETE Accepts Unipolar or Bipolar Inputs
Low Profile 2" x 4" x 0.6" Module
Special Mounting Card Available
Ratiometric Capability
Automatic Sample Capability
GENERAL DESCRIPTION
The ADCll05 is a precision dual slope analog-to-digital con-
verter which is designed for use with external counters and
registers. With this product, the designer can build conversion
systems which utilize any desired counting scheme and which
have resolutions up to and including 4 BCD digits (or 14
binary bits) plus 100% overrange plus sign. This versatility is
particularly useful in instrumentatIon applications where it
descriptions of terminal input/output characteristics will be
presented in a later section to aid the designer in adapting
the ADCll05 to his system's particular requirements.
ANALOG
INPUT
POLARITY
OVERRANGE
PULSE
TRAIN
REGISTER
PARALLEL
OUTPUT
is desired to have outputs scaled directly in terms of engi-
AOC1105
neering or physical units (e.g. pounds and ounces).
Performance specifications for the ADCll05 include 2j1.V/C
zero stability, 5ppm/C gain temperature coefficient, and
:10.0015%/%Vs power supply sensitivity. Two versions are
CONVERT
COMMAND
RESET
CARRY
LATCH
available with accuracies of 0.01 % and 0.1 % of reading :11
count lespectively.
Figure 1. Basic Converter Block Diagram
The ADCll05 is compatible with TTL/DTL as well as certain
older RTL systems. It can be configured to perform conver-
sions on command or automatically at a rate controlled by
simple external circuitry. The ADCll05 also offers both a
:110V and a :11V input range, each with 100% overrange
. capability
BASIC OPERATION
As a dual slope converter, the ADCll05 produces a pulse
train output, the number of pulses in which is proportional
to the analog input voltage. It also provides all of the signals
needed to properly control the external counters and
registers. A simple parallel output analog-to-digital con-
verter built around the ADCll05 is shown in Figure 1.
Although this represents a typical arrangement it is by no
means the only one possible. Detailed timing diagrams and
The conversion cycle begins when the convert command is
applied. The counter is reset to zero, input integration begins,
and output pulses are generated. When the counter reaches full
scale, a carry signal is sent back to the ADCll05 to initiate
reference integration. When the integrator voltage returns to
zero, the pulse train stops and the output register is strobed.
The ~olarity signal is generated at the end of the input inte-
gration period; the overrange signal is generated during the
reference integration period and is valid at the end of
converSIOn.
Information furnished by Analog Devices is believed to be accurate
and reliable. However, no responsibility is assumed by Analog Devices
for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted I)y implica-
tion or otherwise under any patent or patent rights of Analog Devices.
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