ADC1102_15 Datasheet, PDF (1/4 Pages) Analog Devices – High Speed Analog to Digital Converter

,. ANALOG
W DEVICES
't
FEATURES
12-Bit Resolution and Accuracy
Fast 811sConversion Time
low 10ppmtC Maximum Gain TC
User Choice of Input Range
No Missing Codes 0° to +70°C
Small Module Size
HighSpeed
Analogto DigitalConverter
ADC1102
OB GENERAL DESCRIPTION
The ADC 1102 is a high speed analog-to-digital converter, pack-
S _{aged in a small 2" x 4" x 0.4" (51 x 102 x IOmm) module,}
O ^{which performs complete 12-bit conversions in less than 811s.}
Using the successive approximations technique, it converts
) L analog input voltages into natural binary, offset binary, or
two's complement coded outputs. Data outputs are provided
E _{in both parallel and non-return-to-zero serial form.}
TE _{Four analog input ranges are available: 0 to +20V, 0 to +1OV,}
If the DfA output is less than the analog input, the first "0" to
"1" clock transition resets the MSB to logic "1". If the DfA
output is greater than the analog input, the MSB remains at
logie "0".
The first "0" to "1" clock transition also sets the BIT 2 output
to logie "0" and another comparison is made. This process con-
tinues through eachsuccessivebit until the BIT 12 (LSB)com-
parison is completed. At this point the STATUS and CLOCK
OUT return to logic "0" and the conversion eycle ends.
:tlOV, :t5V. The user selects the desired range by making
The serial data output is of the non-return-to-zero (NRZ) format.
various connections to the module terminals. The ADCll 02
The data is available, MS 13first, 20ns after each of the twelve
can also be connected so as to perform conversions of less than "0" to "1" clock transitions.
] 2-bit resolution with a proportionate decrease in conversion
time.
--Il CONVERT
COMMAND
Performance specifications include :tY2LSBmaximum error
relative to full scale, :tIOppm/C maximum gain temperature
CLOCK
OUT
coefficient, and :t3ppm/C differential nonlinearity tempera-
---1 STATUS
L-
tUre coefficient. The ADCl1O2 has no missing codes from 0°
to +70°(;.
MSB
TIMING
BIT2 ---1l
As shown in Figure], the leading edge of the convert command
sets the MSB output to logic "0" and the CLOCK OUT,
STATUS, MSB, and BIT 2 through BIT ] 2 outpUts to logic
"1". Nothing further happens until the convert command re-
tUrns to logic "0", at which time the cloek starts to run and
BIT 3
r-
BIT 11
LSB _---1
u--
the conversion proceeds.
MSB _---1l
With thc MSB in the logic "0" state, the internal digital-to-
analog convcrtcr's output is compared with the analog input.
S_OER_UIA_TL_PUT
BIT 2
J^rI W ^r
MSB BIT 3
BIT 11
--^...^~J LO"
PREVIOUS WORD: 100. . 10
NEW WORD: 101. .01
Figure 1. Timing Diagram
Information furnished by Analog Devices is believed to be accurate
and reliable. However, no responsibility is assumed by Analog Devices
for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implica-
tion or otherwise under any patent or patent rights of Analog Devices.
Route 1 Industrial Park; P.O. Box 280; Norwood, Mass. 02062
Tel: [phone]
TWX: 710/394.6577
West Coast
Mid.West
Texas
213/595.1783
312/894.3300
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