AD9959 Datasheet, PDF (1/9 Pages) Analog Devices – 4 Channel 500MSPS DDS with 10-bit DACs

4 Channel 500MSPS DDS with 10-bit DACs
Preliminary Technical Data
AD9959
FEATURES
Four synchronized DDS channels @500 MSPS
Independent frequency / phase / amplitude
control between all channels
Matched latencies for Freq, Phase, and Amplitude changes
Excellent channel to channel isolation
Frequency sweeping capability
Up to 16 levels of modulation (pin selectable)
Individually programmable DAC full scale currents
Four integrated 10-bit D/A converters(DACs)
32-bit frequency tuning resolution
14-bit phase offset resolution
10-bit output amplitude scaling resolution
Serial I/O Port(SPI) with enhanced data throughput
Software/Hardware controlled power-down
Dual supply operation (1.8 V DDS core / 3.3 V serial I/O)
Built-in synchronization for multiple devices
Selectable REF_CLK multipier(PLL) 4x to 20x (bypassable)
Selectable REF_CLK crystal operation
56 pin LFCSP package
APPLICATIONS
Agile L.O. frequency synthesis
Phased array radar / sonar
Instrumentation
Synchronized clocking
RF source for AOTF
FUNCTIONAL BLOCK DIAGRAM
FREQUENCY
ACCUMULATOR
32
Σ
32
Σ
FREQUENCY
ACCUMULATOR ₃₂
Σ
32
Σ
DDS CORE
Σ
COS(X)
15
10
DDS CORE
Σ
COS(X)
15
10
×
10
×
10
DAC
DAC
FREQUENCY
ACCUMULATOR ₃₂
Σ
32
Σ
DDS CORE
Σ
COS(X)
15
10
×
10
DAC
FREQUENCY
Σ
Σ
ACCUMULATOR 32
32
DDS CORE
Σ
COS(X)
15
10
×
10
DFTW
32
SYNC_IN
SYNC_OUT
I/O_UPDATE
SYNC_CLK
RAMP
RATE
8
FTW
÷4
PHASE
32
OFFSET
14
Timing & Control Logic
SYSTEM
CLK
DIGITAL
MULTIPLIER
10
CONTROL
REGISTERS
OSC / REF_CLK
OSC / REF_CLK
M
REF CLOCK
MULTIPLIER
U
(PLL) 4x to 20x
X
BUFFER / XTAL
OSCILLATOR
CHANNEL
REGISTERS
PROFILE
REGISTERS
CLK_MODE_SEL
1.8V
AVDD
1.8V
DVDD
PPPP
SSSS
0123
Figure 1 AD9959 Block Diagram
DAC
SCALABLE
DAC REF
CURRENT
I/O
Port
Buffer
3.3V
DVDD_IO
IOUT
IOUT
IOUT
IOUT
IOUT
IOUT
IOUT
IOUT
DAC_RSET
PWR_DWN_CTL
MASTER_RESET
SCLK
CS
SDIO_0
SDIO_1
SDIO_2
SDIO_3
Rev. PrB
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