AD9958 Datasheet, PDF (1/40 Pages) Analog Devices – 2-Channel 500 MSPS DDS with 10-Bit DACs

FEATURES
2 synchronized DDS channels @ 500 MSPS
Independent frequency/phase/amplitude control between
channels
Matched latencies for frequency/phase/amplitude changes
Excellent channel-to-channel isolation (>72 dB)
Linear frequency/phase/amplitude sweeping capability
Up to 16 levels of frequency/phase/amplitude modulation
(pin-selectable)
2 integrated 10-bit D/A converters (DACs)
Individually programmable DAC full-scale currents
32-bit frequency tuning resolution
14-bit phase offset resolution
10-bit output amplitude scaling resolution
Serial I/O Port (SPI) with 800Mbps data throughput
Software-/hardware-controlled power-down
Dual supply operation (1.8 V DDS core/3.3 V serial I/O)
Multiple device synchronization
Selectable 4× to 20× REF_CLK multiplier (PLL)
Selectable REF_CLK crystal oscillator
56-Lead LFCSP
2-Channel 500 MSPS DDS
with 10-Bit DACs
AD9958
APPLICATIONS
Agile local oscillator
Phased array radar/sonar
Instrumentation
Synchronized clocking
RF source for AOTF
Single-side band suppressed carrier
Quadrature communications
AD9958
32 ^Σ
FUNCTIONAL BLOCK DIAGRAM
32
Σ
DDS CORE
Σ
COS(X)
15
10
10
DAC
32 ^Σ
32
SYNC_IN
SYNC_OUT
I/O_UPDATE
SYNC_CLK
REF_CLK
REF_CLK
∆FTW
FTW 32
÷4
BUFFER/
XTAL
OSCILLATOR
REF CLOCK
MULTIPLIER
4× TO 20×
CLK_MODE_SEL
DDS CORE
Σ
Σ
15 ^COS(X)
10
10
DAC
PHASE/ 14
∆PHASE
TIMING AND CONTROL LOGIC
SYSTEM
CLK
MUX
1.8V
1.8V
AVDD DVDD
Figure 1.
AMP/ 10
∆AMP
SCALABLE
DAC REF
CURRENT
CONTROL
REGISTERS
CHANNEL
REGISTERS
PROFILE
REGISTERS
I/O
PORT
BUFFER
PS0 PS1 PS2 PS3 DVDD_I/O
IOUT
IOUT
IOUT
IOUT
DAC_RSET
PWR_DWN_CTL
MASTER_RESET
SCLK
CS
SDIO_0
SDIO_1
SDIO_2
SDIO_3
Rev. 0
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