AD9834 Datasheet, PDF (1/20 Pages) Analog Devices – Low Power, +2.3 V to +5.5 V, 50 MHz Complete DDS

PRELIMINARY TECHNICAL DATA
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Low Power, +2.3 V to +5.5 V, 50 MHz
Complete DDS
Preliminary Technical Data
AD9834
FEATURES
+2.3 V to +5.5 V Power Supply
50 MHz Speed
Low Jitter Clock Output
Sine Output/Triangular Output
Serial Loading
Power-Down Option
Narrowband SFDR > 72 dB
20 mW Power Consumption at 3 V
20-Pin TSSOP
APPLICATIONS
Test Equipment
Slow Sweep Generator
DDS Tuning
Digital Modulation
GENERAL DESCRIPTION
The AD9834 is a numerically controlled oscillator
employing a phase accumulator, a SIN ROM and a
10-bit D/A converter integrated on a single CMOS
chip. Clock rates up to 50 MHz are supported with a
power supply from 2.3 V to 5.5 V.
Capability for phase modulation and frequency modula-
tion is provided. Frequency accuracy can be controlled to
one part in 0.25 billion. Modulation is effected by loading
registers through the serial interface.
The AD9834 offers the user a variety of output
waveforms. The SIN ROM can be bypassed so that a
linear up/down ramp is output from the DAC. If the SIN
ROM is not by-passed, a sinusoidal output is available.
Also, if a clock output is required, the MSB of the DAC
data can be output, or the on-chip comparator can be
used.
The digital section is driven by an on-board regulator
which steps down the applied DVDD to +2.5 V when
DVDD exceeds +2.5 V. The analog and digital sections
are independent and can be run from different power
supplies e.g. AVDD can equals 5 V with DVDD equal to
3 V, etc.
The AD9834 has a power-down pin (SLEEP) which
allows external control of a power-down mode. Sections of
the device which are not being used can be powered down to
minimise the current consumption e.g. the DAC can be
powered down when a clock output is being generated.
The part is available in a 20-pin TSSOP package.
FUNCTIONAL BLOCK DIAGRAM
AVDD AGND DGND DVDD CAP/2.5V
REFOUT FS ADJUST
MCLK
FSELECT
28 Bit
FREQ0 REG
28 Bit
FREQ1 REG
MUX
Regulator
VCC
2.5V
Phase
12
Accumulator
(28 Bit)
12 Bit PHASE0 REG
12 Bit PHASE1 REG
MUX
Serial Interface
&
Control Logic
16 Bit Control
Register
On-Board
Reference
FullScale
Control
SIN
ROM
MUX
10-Bit
DAC
MUX
MUX
DIV BY
2
MSB
COMPARATOR
AD9834
COMP
IOUT
IOUTB
SIGN BIT OUT
VIN
FSYNC SCLK SDATA
REV PrM 04/02
PSELECT
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use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
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© Analog Devices, Inc., 2002