AD9830 Datasheet, PDF (1/16 Pages) Analog Devices – CMOS Complete DDS

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FEATURES
+5 V Power Supply
50 MHz Speed
On-Chip SINE Look-Up Table
On-Chip 10-Bit DAC
Parallel Loading
Power-Down Option
72 dB SFDR
250 mW Power Consumption
48-Pin TQFP
APPLICATIONS
DDS Tuning
Digital Demodulation
CMOS
Complete DDS
AD9830
GENERAL DESCRIPTION
This DDS device is a numerically controlled oscillator em-
ploying a phase accumulator, a sine look-up table and a
10-bit D/A converter integrated on a single CMOS chip.
Modulation capabilities are provided for phase modulation
and frequency modulation.
Clock rates up to 50 MHz are supported. Frequency accu-
racy can be controlled to one part in 4 billion. Modulation
is effected by loading registers through the parallel micro-
processor interface.
A power-down pin allows external control of a power-down
mode. The part is available in a 48-pin TQFP package.
FUNCTIONAL BLOCK DIAGRAM
MCLK
FSELECT
FREQ0 REG
FREQ1 REG
DVDD DGND
AVDD AGND REFOUT
FS ADJUST REFIN
ON-BOARD
REFERENCE
FULL SCALE
CONTROL
MUX
PHASE
ACCUMULATOR
(32-BIT)
12
Σ
SIN
ROM
10-BIT DAC
COMP
IOUT
IOUT
PHASE0 REG
PHASE1 REG
PHASE2 REG
PHASE3 REG
MUX
PARALLEL REGISTER
TRANSFER CONTROL
MPU INTERFACE
D0
D15
WR A0 A1 A2
AD9830
SLEEP
RESET
PSEL0 PSEL1
REV. A
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use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1996
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