AD9826_12 Datasheet, PDF (1/20 Pages) Analog Devices – Complete 16-Bit Imaging Signal Processor

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Complete 16-Bit Imaging
Signal Processor
AD9826
FEATURES
16-Bit 15 MSPS A/D Converter
3-Channel 16-Bit Operation up to 15 MSPS
1-Channel 16-Bit Operation up to 12.5 MSPS
2-Channel Mode for Mono Sensors with Odd/Even Outputs
Correlated Double Sampling
1~6؋ Programmable Gain
؎300 mV Programmable Offset
Input Clamp Circuitry
Internal Voltage Reference
Multiplexed Byte-Wide Output
Optional Single Byte Output Mode
3-Wire Serial Digital Interface
3 V/5 V Digital I/O Compatibility
28-Lead SSOP Package
Low Power CMOS: 400 mW (Typ)
Power-Down Mode Available
APPLICATIONS
Flatbed Document Scanners
Digital Copier
Multifunction Peripherals
Infrared Imaging Applications
Machine Vision
PRODUCT DESCRIPTION
The AD9826 is a complete analog signal processor for imaging
applications. It features a 3-channel architecture designed to
sample and condition the outputs of trilinear color CCD arrays.
Each channel consists of an input clamp, Correlated Double
Sampler (CDS), offset DAC, and Programmable Gain Amplifier
(PGA), multiplexed to a high-performance 16-bit A/D converter.
The AD9826 can operate at speeds greater than 15 MSPS with
reduced performance.
The CDS amplifiers may be disabled for use with sensors that
do not require CDS, such as Contact Image Sensors (CIS),
CMOS active pixel sensors, and Focal Plane Arrays.
The 16-bit digital output is multiplexed into an 8-bit output word,
which is accessed using two read cycles. There is an optional
single byte output mode. The internal registers are programmed
through a 3-wire serial interface, and provide adjustment of
the gain, offset, and operating mode.
The AD9826 operates from a single 5 V power supply, typically
consumes 400 mW of power, and is packaged in a 28-lead SSOP.
FUNCTIONAL BLOCK DIAGRAM
AVDD AVSS CML
CAPT CAPB
AVDD AVSS
DRVDD DRVSS
VINR
VING
VINB
OFFSET
CDS
9-BIT
DAC
CDS
9-BIT
DAC
CDS
INPUT
CLAMP
BIAS
9-BIT
DAC
PGA
PGA
PGA
9
CDSCLK1 CDSCLK2
BANDGAP
REFERENCE
AD9826
3:1
MUX
16-BIT
16
16:8 8
ADC
MUX
CONFIGURATION
REGISTER
6
RED
GREEN
BLUE
MUX
REGISTER
RED
GREEN
BLUE
GAIN
REGISTERS
OFFSET
REGISTERS
ADCCLK
DIGITAL
CONTROL
INTERFACE
OEB
DOUT
SCLK
SLOAD
SDATA
REV. B
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