AD9807 Datasheet, PDF (1/24 Pages) Analog Devices – Complete 12-Bit/10-Bit 6 MSPS CCD/CIS Signal Processors

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FEATURES
Pin Compatible 12-Bit and 10-Bit Versions
12-Bit/10-Bit 6 MSPS A/D Converter
Integrated Triple Correlated Double Sampler
3-Channel, 2 MSPS Color Mode
1؋ – 4؋ Analog Programmable Gain Amplifier
Pixel-Rate Digital Gain Adjustment
Pixel-Rate Digital Offset Adjustment
Internal Voltage Reference
No Missing Codes Guaranteed
Microprocessor-Compatible Control Interface
+3.3 V/+5 V Digital I/O Compatibility
Low Power CMOS: 500 mW
64-Pin PQFP Surface Mount Package
Complete 12-Bit/10-Bit 6 MSPS
CCD/CIS Signal Processors
AD9807/AD9805
FUNCTIONAL BLOCK DIAGRAM
PIXEL PIXEL
VREF OFFSET GAIN
AD9807/AD9805
RED
VINR
CDS
PGA
GAIN
REGISTERS
8-10 12-10
REF
GREEN
VING
CDS
PGA
MUX
ADC
12-10
–
X
DOUT
BLUE
VINB
CDS
PGA
INPUT
OFFSET
CONFIG
REGS
ODD
EVEN
MPU
PMOPRUT
PORT
CDSCLK1 CDSCLK2
ADCCLK
CSB
RD
WR
A2
A1
A0
PRODUCTION DESCRIPTION
The AD9807 and AD9805 are complete CCD/CIS imaging
decoders and signal processors on a single monolithic integrated
circuit. The input of the AD9807/AD9805 allows direct ac
coupling of the charge-coupled device (CCD) or contact image
sensor (CIS) output(s). The AD9807/AD9805 includes all the
circuitry to perform three-channel correlated double sampling
(CDS) and programmable gain adjustment of the CCD output;
a 12-bit or 10-bit analog-to-digital converter (ADC) quantizes
the analog signal. After digitization, the on-board digital signal
processor (DSP) circuitry allows pixel rate offset and gain correc-
tion. The DSP also corrects odd/even CCD register imbalance
errors. A parallel control bus provides a simple interface to
8-bit microcontrollers. The AD9807/AD9805 comes in a
space saving 64-pin plastic quad flatpack (PQFP) and is specified
over the commercial (0°C to +70°C) temperature range. By
disabling the CDS, the AD9807/AD9805 are also suitable for
non-CCD applications, or applications that do not require
CDS, such as CIS signal processing.
PRODUCT HIGHLIGHTS
The AD9807/AD9805 offers a complete, single chip CCD
imaging front end in a 64-pin plastic quad flatpack (PQFP).
On-Chip PGA—The AD9807/AD9805 includes a 3-channel
analog programmable gain amplifier; it is programmable from
1× to 4× in 16 increments.
On-Chip CDS—An integrated 3-channel correlated double
sampler allows easy ac coupling directly from the CCD sensor
outputs. Additionally, the CDS reduces low frequency noise
and reset feedthrough.
On-Chip Voltage Reference—The AD9807/AD9805 includes a
2 V bandgap reference that allows the input range of the device to
be configured for input spans up to 4 V.
6 MSPS A/D Converter—A highly linear 12-bit or 10-bit A/D
converter sequentially digitizes the red, green and blue CDS
outputs ensuring no missing code performance. The user may also
configure the AD9807/AD9805 for single channel operation.
Digital Gain & Offset Correction—Pixel rate digital gain and
offset correction blocks allow precise repeatable correction of
imaging system error sources.
Digital I/O Compatibility—The AD9807/AD9805 offers
+3.3 V/+5 V logic level compatibility.
Pin-Compatible 12-Bit and 10-Bit Versions—The AD9807 is
also offered in a pin-compatible 10-bit version, the AD9805,
allowing upgrade-ability and simplifying design issues across
different scanner models.
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© Analog Devices, Inc., 1997