AD9806_15 Datasheet, PDF (1/12 Pages) Analog Devices – Complete 10-Bit 18 MSPS CCD Signal Processor

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FEATURES
Pin-Compatible with Industry Standard AD9803
18 MSPS Correlated Double Sampler (CDS)
Low Noise PGA with 0 dB to 34 dB Gain Range
Low Noise Clamp Circuits
Analog Preblanking Function
10-Bit 18 MSPS A/D Converter
AUX Input with Input Clamp and PGA
Direct ADC Input with Input Clamp
AUXMID Input with PGA
3-Wire Serial Interface for Digital Control
Two Auxiliary 8-Bit DACs
3 V Single Supply Operation
Low Power: 65 mW @ 2.7 V Supply
48-Lead LQFP Package
APPLICATIONS
Camcorders (8 mm and DVC)
Digital Still Cameras
Complete 10-Bit 18 MSPS
CCD Signal Processor
AD9806
PRODUCT DESCRIPTION
The AD9806 is a complete analog signal processor for CCD
applications. It features an 18 MHz single-channel architecture
designed to sample and condition the outputs of interlaced and
progressive scan area CCD arrays. The AD9806’s signal chain
consists of an input clamp, correlated double sampler (CDS),
digitally programmable gain amplifier (PGA), black level clamp,
and 10-bit A/D converter. Additional input modes are provided
for processing analog video signals.
The internal registers are programmed through a 3-wire serial
digital interface. Programmable features include gain adjust-
ment, black level adjustment, input configuration, and power-
down modes.
The AD9806 operates from a single 3 V power supply, typically
dissipating 75 mW. Packaged in a space-saving 48-lead LQFP,
the AD9806 is specified over an operating temperature range of
–20°C to +85 C.
CCDIN
CLPDM
DAC1
DAC2
FUNCTIONAL BLOCK DIAGRAM
PBLK
CLPOB
CLAMP
0dB~34dB
CDS
PGA
MUX
S/H
AD9806
10
ADC
DOUT
CLAMP
8-BIT
DAC
8-BIT
DAC
10-BIT
DAC
INTF
3
0dB~15dB –4~14dB
PGA
PGA
REF
CLAMP
TIMING
GENERATOR
VRT
VRB
3-W INTF ADCIN AUXIN AUXMID
SHP SHD ADCCLK
REV. 0
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© Analog Devices, Inc., 2001