AD9763 Datasheet, PDF (1/28 Pages) Analog Devices – 10-Bit, 125 MSPS Dual TxDAC+ D/A Converter

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10-Bit, 125 MSPS
Dual TxDAC+^® D/A Converter
AD9763*
FEATURES
10-Bit Dual Transmit DAC
125 MSPS Update Rate
Excellent SFDR and IMD: 78 dBc
Excellent Gain and Offset Matching: 0.1%
Fully Independent or Single Resistor Gain Control
Dual Port or Interleaved Data
On-Chip 1.2 V Reference
Single 5 V or 3 V Supply Operation
Power Dissipation: 380 mW @ 5 V
Power-Down Mode: 50 mW @ 5 V
48-Lead LQFP
APPLICATIONS
Communications
Base Stations
Digital Synthesis
Quadrature Modulation
FUNCTIONAL BLOCK DIAGRAM
DVDD DCOM AVDD ACOM CLK1
PORT1
“1”
LATCH
“1”
DAC
WRT1
WRT2
PORT2
DIGITAL
INTERFACE
AD9763
REFERENCE
BIAS
GENERATOR
“2”
LATCH
“2”
DAC
MODE
CLK2
I_OUTA1
I_OUTB1
REFIO
FSADJ1
FSADJ2
GAINCTRL
SLEEP
I_OUTA2
I_OUTB2
PRODUCT DESCRIPTION
The AD9763 is a dual port, high speed, two-channel, 10-bit
CMOS DAC. It integrates two high quality 10-bit TxDAC+
cores, a voltage reference and digital interface circuitry into a small
48-lead LQFP package. The AD9763 offers exceptional ac and
dc performance while supporting update rates up to 125 MSPS.
The AD9763 has been optimized for processing I and Q data in
communications applications. The digital interface consists of
two double-buffered latches as well as control logic. Separate
write inputs allow data to be written to the two DAC ports
independent of one another. Separate clocks control the update
rate of the DACs.
A mode control pin allows the AD9763 to interface to two separate
data ports, or to a single interleaved high speed data port. In inter-
leaving mode the input data stream is demuxed into its original I
and Q data and then latched. The I and Q data is then con-
verted by the two DACs and updated at half the input data rate.
The GAINCTRL pin allows two modes for setting the full-scale
current (I_OUTFS) of the two DACs. I_OUTFS for each DAC can be
set independently using two external resistors, or I_OUTFS for both
DACs can be set by using a single external resistor.**
The DACs utilize a segmented current source architecture com-
bined with a proprietary switching technique to reduce glitch
energy and to maximize dynamic accuracy. Each DAC provides
differential current output thus supporting single-ended or
differential applications. Both DACs can be simultaneously
updated and provide a nominal full-scale current of 20 mA. The
full-scale currents between each DAC are matched to within 0.1%.
The AD9763 is manufactured on an advanced low cost CMOS
process. It operates from a single supply of 3.0 V to 5.0 V and
consumes 380 mW of power.
PRODUCT HIGHLIGHTS
1. The AD9763 is a member of a pin-compatible family of dual
TxDACs providing 8-, 10-, 12- and 14-bit resolution.
2. Dual 10-Bit, 125 MSPS DACs: A pair of high performance
DACs optimized for low distortion performance provide for
flexible transmission of I and Q information.
3. Matching: Gain matching is typically 0.1% of full scale, and
offset error is better than 0.02%.
4. Low Power: Complete CMOS Dual DAC function operates
on 380 mW from a 3.0 V to 5.0 V single supply. The DAC
full-scale current can be reduced for lower power operation,
and a sleep mode is provided for low power idle periods.
5. On-Chip Voltage Reference: The AD9763 includes a 1.20 V
temperature-compensated bandgap voltage reference.
6. Dual 10-Bit Inputs: The AD9763 features a flexible dual-
port interface allowing dual or interleaved input data.
TxDAC+ is a registered trademark of Analog Devices, Inc.
**Patent pending.
**Please see GAINCTRL Mode section, for important date code information on
this feature.
REV. B
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© Analog Devices, Inc., 2000