AD9627 Datasheet, PDF (1/40 Pages) Analog Devices – 12-Bit, 80/105/125/150 MSPS, 1.8 V Dual Analog-to-Digital Converter

Preliminary Technical Data
12-Bit, 80/105/125/150 MSPS, 1.8 V
Dual Analog-to-Digital Converter
AD9627
FEATURES
SNR = 69.5 dBc (70.5dBFS) to 70 MHz @ 150 MSPS
SFDR = 85 dBc to 70 MHz @ 150 MSPS
Low Power: 780 mW
1.8V analog supply operation
1.8V to 3.3V CMOS output supply or 1.8V LVDS supply
Integer 1 to 8 Input Clock Divider
IF sampling frequencies to 450 MHz
Internal ADC voltage reference
Integrated ADC sample-and-hold inputs
Flexible analog input: 1 V p-p to 2 V p-p range
Differential analog inputs with 650MHz bandwidth
ADC clock duty cycle stabilizer
95 dB channel isolation/crosstalk
Serial Port Control
User-configurable built-in self-test (BIST) capability
Energy-saving power-down modes
Integrated Receive Features:
Fast Detect/Threshold Bits
Composite Signal monitor
APPLICATIONS
Communications
Diversity radio systems
Multimode digital receivers:
GSM, EDGE, PHS, UMTS, WCDMA, CDMA-ONE,
IS95, CDMA2000, IMT-2000, WiMax
I/Q demodulation systems
Smart antenna systems
General-purpose software radios
Broadband data applications
FUNCTIONAL BLOCK DIAGRAM
Figure 1. AD9627 Functional Block Diagram
Rev. PrA
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