AD9260_15 Datasheet, PDF (1/44 Pages) Analog Devices – High Speed Oversampling CMOS ADC with 16-Bit Resolution at a 2.5 MHz Output Word Rate

High Speed Oversampling CMOS ADC with
16-Bit Resolution at a 2.5 MHz Output Word Rate
AD9260
FEATURES
Monolithic 16-bit, oversampled A/D converter
8× oversampling mode, 20 MSPS clock
2.5 MHz output word rate
1.01 MHz signal passband with 0.004 dB ripple
Signal-to-noise ratio: 88.5 dB
Total harmonic distortion: –96 dB
Spurious-free dynamic range: 100 dB
Input referred noise: 0.6 LSB
Selectable oversampling ratio: 1×, 2×, 4×, 8×
Selectable power dissipation: 150 mW to 585 mW
85 dB stop-band attenuation
0.004 dB pass-band ripple
Linear phase
Single 5 V analog supply, 5 V/3 V digital supply
Synchronize capability for parallel ADC interface
Twos complement output data
44-lead MQFP
PRODUCT DESCRIPTION
The AD9260 is a 16-bit, high-speed oversampled analog-to-
digital converter (ADC) that offers exceptional dynamic range
over a wide bandwidth. The AD9260 is manufactured on an
advanced CMOS process. High dynamic range is achieved with
an oversampling ratio of 8× through the use of a proprietary
technique that combines the advantages of sigma-delta and
pipeline converter technologies. The AD9260 is a switched-
capacitor ADC with a nominal full-scale input range of 4 V. It
offers a differential input with 60 dB of common-mode rejec-
tion of common-mode signals. The signal range of each differ-
ential input is ±1 V centered on a 2.0 V common-mode level.
The on-chip decimation filter is configured for maximum
performance and flexibility. A series of three half-band FIR
filter stages provide 8× decimation filtering with 85 dB of stop-
band attenuation and 0.004 dB of pass-band ripple. An onboard
digital multiplexer allows the user to access data from the
various stages of the decimation filter. The on-chip
programmable reference and reference buffer amplifier are
configured for maximum accuracy and flexibility. An external
reference can also be chosen to suit the user’s specific dc
accuracy and drift requirements.
The AD9260 operates on a single +5 V supply, typically
consuming 585 mW of power. A power scaling circuit is
provided allowing the AD9260 to operate at power consump-
Rev. C
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FUNCTIONAL BLOCK DIAGRAM
RESET/
SYNC DVSS DVDD
VINA
VINB
REF TOP
REF
BOTTOM
COMMON
MODE
VREF
SENSE
REFCOM
MULTIBIT
SIGMA-DELTA
MODULATOR
AD9260
DIGITAL
DEMODULATOR
12-BIT:
20MHz
16-BIT:
10MHz
STAGE 1:2X
DECIMATION
FILTER
REFERENCE
BUFFER
16-BIT:
5MHz
STAGE 2:2X
DECIMATION
FILTER
16-BIT: ^{STAGE 3:2X}
2.5MHz ^DECIMATION
FILTER
BANDGAP
REFERENCE ^BIAS
CLOCK
MODE
CIRCUIT BUFFER REGISTER
OTR
BIT1–
BIT16
DAV
READ
BIAS ADJUST CLK
MODE CS
Figure 1.
tion levels as low as 150 mW at reduced clock and data rates.
The AD9260 is available in a 44-lead MQFP package and is
specified to operate over the industrial temperature range.
PRODUCT HIGHLIGHTS
The AD9260 is fabricated on a very cost effective CMOS
process. High speed, precision, mixed-signal analog circuits are
combined with high density digital filter circuits. The AD9260
offers a complete single-chip 16-bit sampling ADC with a 2.5
MHz output data rate in a 44-lead MQFP.
Selectable Internal Decimation Filtering—The AD9260
provides a high performance decimation filter with 0.004 dB
pass-band ripple and 85 dB of stop-band attenuation. The filter
is configurable with options for 1×, 2×, 4×, and 8× decimation.
Power Scaling—The AD9260 consumes a low 585 mW of
power at 16-bit resolution and 2.5 MHz output data rate. Its
power can be scaled down to as low as 150 mW at reduced
clock rates.
Single Supply—Both the analog and digital portions of the
AD9260 can operate off of a single +5 V supply, simplifying
system power supply design. The digital logic will also
accommodate a single +3 V supply for reduced power.
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