AD9163 Datasheet, PDF (1/124 Pages) Analog Devices – DAC update rate up to 12 GSPS

Data Sheet
16-Bit, 12 GSPS,
RF DAC and Digital Upconverter
AD9163
FEATURES
DAC update rate up to 12 GSPS (minimum)
Direct RF synthesis at 6 GSPS (minimum)
DC to 3 GHz in nonreturn-to-zero (NRZ)mode
DC to 6 GHz in 2× NRZ mode
1.5 GHz to 7.5 GHz in Mix-Mode
Selectable interpolation
6×, 8×, 12×, 16×, 24×
Excellent dynamic performance
APPLICATIONS
Broadband communications systems
DOCSIS 3.1 cable modem termination system (CMTS)/
video on demand (VOD)/edge quadrature amplitude
modulation (EQAM)
Wireless communications infrastructure
MC-GSM, W-CDMA, LTE, LTE-A, point to point
GENERAL DESCRIPTION
bandwidth of up to 1 GHz and the complex NCO and digital
upconverter enable dual band and triple band direct RF
synthesis of wireless infrastructure signals, eliminating costly
analog upconverters.
Wide analog bandwidth capability combines with high dynamic
range to support DOCSIS 3.1 cable infrastructure compliance
from the minimum of one carrier up to 1 GHz of signal bandwidth,
making it ideal for cable multiple dwelling unit (MDU) applications.
A 2× interpolator filter (FIR85) enables the AD9163 to be config-
ured for lower data rates and converter clocking to reduce the
overall system power and ease the filtering requirements. In
Mix-Mode™ operation, the AD9163 can reconstruct RF carriers
in the second and third Nyquist zones up to 7.5 GHz while still
maintaining exceptional dynamic range. The output current can
be programmed from 8 mA to 38.76 mA. The AD9163 data
interface consists of up to eight JESD204B serializer/deserializer
(SERDES) lanes that are programmable in terms of lane speed
and number of lanes to enable application flexibility.
The AD9163¹ is a high performance, 16-bit digital-to-analog
converter (DAC) that supports data rates to 6 GSPS. The DAC
core is based on a quad-switch architecture coupled with a 2×
A serial peripheral interface (SPI) configures the AD9163 and
monitors the status of all the registers. The AD9163 is offered in
a 169-ball, 11 mm × 11 mm, 0.8 mm pitch CSP_BGA package.
interpolator filter that enables an effective DAC update rate of
up to 12 GSPS in some modes. The high dynamic range and
bandwidth makes this DAC ideally suited for the most
demanding high speed radio frequency (RF) DAC applications.
Superior RF performance and deep interpolation rates enable
use of the AD9163 in many wireless infrastructure applications,
including MC-GSM, W-CDMA, LTE, and LTE-A. The wide
PRODUCT HIGHLIGHTS
1. High dynamic range and signal reconstruction bandwidth
supports RF signal synthesis of up to 7.5 GHz.
2. Up to eight lanes JESD204B SERDES interface, flexible in
terms of number of lanes and lane speed.
3. Bandwidth and dynamic range to meet multiband wireless
communications standards with margin.
FUNCTIONAL BLOCK DIAGRAM
RESET IRQ
ISET VREF
SDIO
SDO
CS
SCLK
SERDIN0±
SERDIN7±
SYNCOUT±
SYSREF±
SPI
JESD
HB
2×
HB
3×
AD9163
HB
2×
NCO
VREF
NRZ RZ MIX
INV
SINC
DAC
CORE
OUTPUT±
HB
TO JESD
CLOCK
2×,
TO DATAPATH
DISTRIBUTION
4×,
8×
TX_ENABLE
Figure 1.
CLK±
1 _{Protected by U.S. Patents 6,842,132 and 7,796,971.}
Rev. 0
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