AD8400 Datasheet, PDF (1/20 Pages) Analog Devices – 1-/2-/4-Channel Digital Potentiometers

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1-/2-/4-Channel
Digital Potentiometers
AD8400/AD8402/AD8403
FEATURES
256 Position
Replaces 1, 2 or 4 Potentiometers
1 k⍀, 10 k⍀, 50 k⍀, 100 k⍀
Power Shut Down—Less than 5 ␮A
3-Wire SPI Compatible Serial Data Input
10 MHz Update Data Loading Rate
+2.7 V to +5.5 V Single-Supply Operation
Midscale Preset
APPLICATIONS
Mechanical Potentiometer Replacement
Programmable Filters, Delays, Time Constants
Volume Control, Panning
Line Impedance Matching
Power Supply Adjustment
GENERAL DESCRIPTION
The AD8400/AD8402/AD8403 provide a single, dual or quad
channel, 256 position digitally controlled variable resistor (VR)
device. These devices perform the same electronic adjustment
function as a potentiometer or variable resistor. The AD8400
contains a single variable resistor in the compact SO-8 package.
The AD8402 contains two independent variable resistors in
space saving SO-14 surface mount package. The AD8403 con-
tains four independent variable resistors in 24-lead PDIP, SOIC
and TSSOP packages. Each part contains a fixed resistor with a
wiper contact that taps the fixed resistor value at a point deter-
mined by a digital code loaded into the controlling serial input
register. The resistance between the wiper and either endpoint
of the fixed resistor varies linearly with respect to the digital
code transferred into the VR latch. Each variable resistor offers
a completely programmable value of resistance, between the A
terminal and the wiper or the B terminal and the wiper. The
fixed A to B terminal resistance of 1 kΩ, 10 kΩ, 50 kΩ or 100 kΩ
has a ±1% channel-to-channel matching tolerance with a nominal
temperature coefficient of 500 ppm/°C. A unique switching cir-
cuit minimizes the high glitch inherent in traditional switched
resistor designs avoiding any make-before-break or break-before-
make operation.
Each VR has its own VR latch that holds its programmed
resistance value. These VR latches are updated from an SPI
compatible serial-to-parallel shift register that is loaded from a
standard 3-wire serial-input digital interface. Ten data bits make
up the data word clocked into the serial input register. The data
word is decoded where the first two bits determine the address
of the VR latch to be loaded, the last eight bits are data. A serial
data output pin at the opposite end of the serial register allows
simple daisy-chaining in multiple VR applications without addi-
tional external decoding logic.
FUNCTIONAL BLOCK DIAGRAM
V_DD
DGND
SDI
CLK
CS
AD8403
1
DAC 2
SELECT
3
A1, A0 ⁴
2
8
10-BIT
SERIAL
LATCH
D
CK Q RS
SDO
8-BIT ^{8 RDAC1}
LATCH
CK RS
SHDN
8-BIT ⁸
LATCH
RDAC2
CK RS
SHDN
8-BIT ⁸
LATCH
RDAC3
CK RS
SHDN
8-BIT ^{8 RDAC4}
LATCH
CK RS
SHDN
A1
W1
B1
AGND1
A2
W2
B2
AGND2
A3
W3
B3
AGND3
A4
W4
B4
AGND4
RS
SHDN
The reset (RS) pin forces the wiper to the midscale position by
loading 80_H into the VR latch. The SHDN pin forces the resis-
tor to an end-to-end open circuit condition on the A terminal
and shorts the wiper to the B terminal, achieving a microwatt
power shutdown state. When SHDN is returned to logic high,
the previous latch settings put the wiper in the same resistance
setting prior to shutdown. The digital interface is still active in
shutdown so that code changes can be made which will produce
new wiper positions when the device is taken out of shutdown.
The AD8400 is available in both the SO-8 surface mount and
the 8-lead plastic DIP package.
The AD8402 is available in both surface mount (SO-14) and
the 14-lead plastic DIP package, while the AD8403 is available
in a narrow body 24-lead plastic DIP and the 24-lead surface
mount package. The AD8402/AD8403 are also offered in the
1.1 mm thin TSSOP-14/TSSOP-24 package for PCMCIA ap-
plications. All parts are guaranteed to operate over the extended
industrial temperature range of –40°C to +85°C.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
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© Analog Devices, Inc., 1997