AD8392A_16 Datasheet, PDF (1/13 Pages) Analog Devices – Low Power, High Output Current, Quad Op Amp, Dual-Channel ADSL/ADSL2+ Line Driver

Data Sheet
Low Power, High Output Current, Quad Op
Amp, Dual-Channel ADSL/ADSL2+ Line Driver
AD8392A
FEATURES
Four current feedback, high current amplifiers
Ideal for use as ADSL/ADSL2+ dual-channel central office
(CO) line drivers
Low power operation
Power supply operation from ±5 V (+10 V) up to ±12 V (+24 V)
Less than 3 mA/amp quiescent supply current for full
power ADSL/ADSL2+ CO applications (20.4 dBm line
power, 5.5 CF)
Three active power modes plus shutdown
High output voltage and current drive
500 mA peak output drive current
42.6 V p-p differential output voltage
Low distortion
−93 dBc @1 MHz second harmonic
−103 dBc @ 1 MHz third harmonic
High speed: 515 V/μs differential slew rate
Additional functionality of AD8392AACP
On-chip, common-mode voltage generation
APPLICATIONS
ADSL/ADSL2+ CO line drivers
XDSL line drivers
GENERAL DESCRIPTION
The AD8392A is comprised of four high output current, low
power consumption, operational amplifiers. It is particularly
well suited for the CO driver interface in digital subscriber line
systems, such as ADSL and ADSL2+. The driver is capable of
providing enough power to deliver 20.4 dBm to a line, while
compensating for losses due to hybrid insertion and back
termination resistors.
The AD8392A is available in two thermally enhanced packages,
a 28-lead TSSOP_EP (AD8392AARE) and a 5 mm × 5 mm,
32-lead LFCSP (AD8392AACP). Four bias modes are available
via the use of two digital bits (PD1, PD0).
Additionally, the AD8392AACP provides VCOM pins for on-chip,
common-mode voltage generation.
The low power consumption, high output current, high output
voltage swing, and robust thermal packaging enable the
AD8392A to be used as the CO line drivers in ADSL and other
xDSL systems.
PIN CONFIGURATIONS
V_EE 1
PD0 1, 2 2
PD1 1, 2 3
+V_IN1 4
–V_IN1 5
V_OUT1 6
V_CC 7
NIC 8
V_OUT3 9
–V_IN3 10
+V_IN3 11
NIC 12
NIC 13
GND 14
1
2
AD8392A
TOP VIEW
(Not To Scale)
3
4
28 GND
27 NIC
26 NIC
25 +V_IN2
24 –V_IN2
23 V_OUT2
22 NIC
21 V_CC
20 V_OUT4
19 –V_IN4
18 +V_IN4
17 _{PD1 3, 4}
16 _{PD0 3, 4}
15 V_EE
NOTES
1. NIC = NO INTERNAL CONNECTION.
2. EXPOSED PAD. CONNECT THE EXPOSED
PAD TO GROUND PLANE.
Figure 1. AD8392AARE, 28-Lead TSSOP_EP
NIC 1
–V_IN1 2
V_OUT1 3
V_CC 4
NIC ⁵
V_OUT3 ⁶
–V_IN3 ⁷
NIC ⁸
32 31 30 29 28 27 26 25
1
2
AD8392A
TOP VIEW
(Not to Scale)
3
4
24 NIC
23 ^–VIN²
22 ^VOUT²
21 NIC
20 V_CC
19 VOUT4
18 –V_IN4
17 NIC
9 10 11 12 13 14 15 16
NOTES
1. NIC = NO INTERNAL CONNECTION.
2. EXPOSED PAD. CONNECT THE EXPOSED
PAD TO GROUND PLANE.
Figure 2. AD8392AACP, 5 mm × 5 mm, 32-Lead LFCSP
Rev. A
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