AD8332 Datasheet, PDF (1/28 Pages) Analog Devices – Dual VGA with Ultralow Noise Preamplifier and Programmable RIN

FEATURES
• Ultralow noise preamplifier
− Voltage noise = 0.74 nV/√Hz
− Current noise = 2.5 pA/√Hz
• 3 dB bandwidth: 120 MHz
• Low power: 125 mW/channel
• Wide gain range with programmable postamp
− –4.5 dB to +43.5 dB
− +7.5 dB to +55.5 dB
• Low output-referred noise: 48 nV/√Hz typical
• Active input impedance matching
• Optimized for 10-/12- bit ADCs
• Selectable output clamping level
• Single 5 V supply operation
• Available in space-saving chip scale package
APPLICATIONS
• Ultrasound and sonar time-gain control
• High performance AGC systems
• I/Q signal processing
• High speed dual ADC driver
GENERAL DESCRIPTION
The AD8332 is an ultralow noise, dual channel linear-in-dB
variable gain amplifier (VGA). Although optimized for ultrasound
systems, it may be used for a low noise variable gain control in any
application of frequencies up to 120 MHz.
Each channel of the AD8332 consists of an ultralow noise
preamplifier (LNA), an X-AMP VGA with 48 dB of gain range, and
a selectable gain postamplifier with adjustable output limiting. The
LNA gain is 19 dB with a single-ended input and differential
outputs capable of accurate, programmable active input impedance
matching by selecting an external feedback resistor. Active
impedance control optimizes noise performance for applications
that benefit from input matching.
The 48 dB gain range of the VGA makes the AD8332 suitable for a
variety of applications. Excellent bandwidth uniformity is
maintained across the entire range. The gain control interface
provides precise linear-in-dB scaling of 50 dB/V for control
voltages between 40 mV and 1 V. Factory trim ensures excellent
part-to-part and channel-to-channel gain matching. Differential
signal paths lead to superb second and third order distortion
performance and low crosstalk.
Rev. 0
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Dual VGA with Ultralow Noise
Preamplifier and Programmable R_IN
AD8332
FUNCTIONAL BLOCK DIAGRAM
LON1 LOP1 VIP1 VIN1 VPSV VCM1 VCM2
25 24 22 21
15
20 9
HILO
19
VPS1 26
COM1 23 _+19dB
INH1 27
LMD1 28
LNA 1
V_MID
[(–48 to 0) + 21] dB
3.5dB/
15.5dB
VGA 1
POST
AMP1
17 VOH1
16 VOL1
BIAS
(V_MID)
BIAS AND
INTERPOLATOR
GAIN
INT
10 GAIN
LMD2 1
INH2 2
VSP2 3
COM2 6
LNA 2
VGA 2
POST
AMP2
CLAMP
13 VOL2
12 VOH2
4
57
8
14
18
11
LON2 LOP2 VIP2 VIN2 COMM ENB RCLMP
Figure 1. 28-Lead TSSOP
50
V_GAIN = 1V
40
0.8V
30
0.6V
20
0.4V
10
0.2V
0
0V
–10
–20
100k
1M
10M
100M
1G
FREQUENCY – Hz
Figure 2. Frequency Response vs. Gain
The VGA’s low output-referred noise is advantageous in driving
high speed differential ADCs. The gain of the postamplifier may
be pin selected to 3.5 dB or 15.5 dB to optimize gain range and
output noise for 12-bit or 10-bit converter applications. The output
may be limited to a user-selected clamping level, preventing input
overload to a subsequent ADC. An external resistor adjusts the
clamping level.
The AD8332 is available in 28-lead TSSOP and 32-lead LFCSP
packages and operates from a single 5 V supply. The total quiescent
power consumption is 250 mW and a power-down pin is provided.
The operating temperature range is –40°C to +85°C.
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